Replace scalarlist optimizations and split external array loads into two IL instructions.

runtime/vm/flow_graph_allocator.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/flow_graph_allocator.h"
 
 #include "vm/bit_vector.h"
 #include "vm/intermediate_language.h"
 #include "vm/il_printer.h"
 #include "vm/flow_graph.h"
@@ skipping 45 matching lines @@
 
 
 static intptr_t ToInstructionEnd(intptr_t pos) {
   return (pos | 1);
 }
 
 
 FlowGraphAllocator::FlowGraphAllocator(const FlowGraph& flow_graph)
   : flow_graph_(flow_graph),
     reaching_defs_(flow_graph),
-    mint_values_(NULL),
+    value_representations_(flow_graph.max_virtual_register_number()),
     block_order_(flow_graph.reverse_postorder()),
     postorder_(flow_graph.postorder()),
     live_out_(block_order_.length()),
     kill_(block_order_.length()),
     live_in_(block_order_.length()),
     vreg_count_(flow_graph.max_virtual_register_number()),
     live_ranges_(flow_graph.max_virtual_register_number()),
     cpu_regs_(),
     fpu_regs_(),
     blocked_cpu_registers_(),
     blocked_fpu_registers_(),
     cpu_spill_slot_count_(0) {
   for (intptr_t i = 0; i < vreg_count_; i++) live_ranges_.Add(NULL);
+  for (intptr_t i = 0; i < vreg_count_; i++) {
+    value_representations_.Add(kNoRepresentation);
+  }
 
   // All registers are marked as "not blocked" (array initialized to false).
   // Mark the unavailable ones as "blocked" (true).
   for (intptr_t i = 0; i < kFirstFreeCpuRegister; i++) {
     blocked_cpu_registers_[i] = true;
   }
   for (intptr_t i = kLastFreeCpuRegister + 1; i < kNumberOfCpuRegisters; i++) {
     blocked_cpu_registers_[i] = true;
   }
   blocked_cpu_registers_[CTX] = true;
@@ skipping 288 matching lines @@
     // Shrink the first use interval. It was optimistically expanded to
     // cover the the block from the start to the last use in the block.
     ASSERT(first_use_interval_->start_ <= pos);
     first_use_interval_->start_ = pos;
   }
 }
 
 
 LiveRange* FlowGraphAllocator::GetLiveRange(intptr_t vreg) {
   if (live_ranges_[vreg] == NULL) {
-    Location::Representation rep =
-        mint_values_->Contains(vreg) ? Location::kMint : Location::kDouble;
+    Representation rep = value_representations_[vreg];
+    ASSERT(rep != kNoRepresentation);
     live_ranges_[vreg] = new LiveRange(vreg, rep);
   }
   return live_ranges_[vreg];
 }
 
 
 LiveRange* FlowGraphAllocator::MakeLiveRangeForTemporary() {
-  Location::Representation ignored = Location::kDouble;
+  // Representation does not matter for temps.
+  Representation ignored = kNoRepresentation;
   LiveRange* range = new LiveRange(kTempVirtualRegister, ignored);
 #if defined(DEBUG)
   temporaries_.Add(range);
 #endif
   return range;
 }
 
 
 void FlowGraphAllocator::BlockRegisterLocation(Location loc,
                                                intptr_t from,
                                                intptr_t to,
                                                bool* blocked_registers,
                                                LiveRange** blocking_ranges) {
   if (blocked_registers[loc.register_code()]) {
     return;
   }
 
   if (blocking_ranges[loc.register_code()] == NULL) {
-    Location::Representation ignored = Location::kDouble;
+    Representation ignored = kNoRepresentation;
     LiveRange* range = new LiveRange(kNoVirtualRegister, ignored);
     blocking_ranges[loc.register_code()] = range;
     range->set_assigned_location(loc);
 #if defined(DEBUG)
     temporaries_.Add(range);
 #endif
   }
 
   blocking_ranges[loc.register_code()]->AddUseInterval(from, to);
 }
@@ skipping 519 matching lines @@
     //              [--)
     //
     // The stack bitmap describes the position i.
     for (intptr_t reg = 0; reg < kNumberOfCpuRegisters; reg++) {
       BlockLocation(Location::RegisterLocation(static_cast<Register>(reg)),
                     pos,
                     pos + 1);
     }
 
     for (intptr_t reg = 0; reg < kNumberOfFpuRegisters; reg++) {
-      Location::Representation ignored = Location::kDouble;
+      Representation ignored = kNoRepresentation;
       BlockLocation(
           Location::FpuRegisterLocation(static_cast<FpuRegister>(reg), ignored),
           pos,
           pos + 1);
     }
 
 
 #if defined(DEBUG)
     // Verify that temps, inputs and output were specified as fixed
     // locations.  Every register is blocked now so attempt to
@@ skipping 618 matching lines @@
     }
     range = range->next_sibling();
   }
 }
 
 
 void FlowGraphAllocator::Spill(LiveRange* range) {
   LiveRange* parent = GetLiveRange(range->vreg());
   if (parent->spill_slot().IsInvalid()) {
     AllocateSpillSlotFor(parent);
-    if (register_kind_ == Location::kRegister) {
+    if (range->representation() == kTagged) {
       MarkAsObjectAtSafepoints(parent);
     }
   }
   range->set_assigned_location(parent->spill_slot());
   ConvertAllUses(range);
 }
 
 
 intptr_t FlowGraphAllocator::FirstIntersectionWithAllocated(
     intptr_t reg, LiveRange* unallocated) {
@@ skipping 135 matching lines @@
         if (!reaching_defs_.Get(phi)->Contains(unallocated->vreg())) {
           used_on_backedge[reg] = true;
         }
       }
     }
 
     if (used_on_backedge[candidate]) {
       TRACE_ALLOC(OS::Print(
           "considering %s for v%"Pd": has interference on the back edge"
           " {loop [%"Pd", %"Pd")}\n",
-          MakeRegisterLocation(candidate, Location::kDouble).Name(),
+          MakeRegisterLocation(candidate, kUnboxedDouble).Name(),
           unallocated->vreg(),
           loop_header->entry()->start_pos(),
           loop_header->last_block()->end_pos()));
       for (intptr_t reg = 0; reg < NumberOfRegisters(); ++reg) {
         if (blocked_registers_[reg] ||
             (reg == candidate) ||
             used_on_backedge[reg]) {
           continue;
         }
 
         const intptr_t intersection =
             FirstIntersectionWithAllocated(reg, unallocated);
         if (intersection >= free_until) {
           candidate = reg;
           free_until = intersection;
           TRACE_ALLOC(OS::Print(
               "found %s for v%"Pd" with no interference on the back edge\n",
-              MakeRegisterLocation(candidate, Location::kDouble).Name(),
+              MakeRegisterLocation(candidate, kUnboxedDouble).Name(),
               candidate));
           break;
         }
       }
     }
   }
 
   ASSERT(0 <= kMaxPosition);
   if (free_until != kMaxPosition) {
     for (intptr_t reg = 0; reg < NumberOfRegisters(); ++reg) {
       if (blocked_registers_[reg] || (reg == candidate)) continue;
       const intptr_t intersection =
           FirstIntersectionWithAllocated(reg, unallocated);
       if (intersection > free_until) {
         candidate = reg;
         free_until = intersection;
         if (free_until == kMaxPosition) break;
       }
     }
   }
 
   // All registers are blocked by active ranges.
   if (free_until <= unallocated->Start()) return false;
 
   TRACE_ALLOC(OS::Print("assigning free register "));
-  TRACE_ALLOC(MakeRegisterLocation(candidate, Location::kDouble).Print());
+  TRACE_ALLOC(MakeRegisterLocation(candidate, kUnboxedDouble).Print());
   TRACE_ALLOC(OS::Print(" to v%"Pd"\n", unallocated->vreg()));
 
   if (free_until != kMaxPosition) {
     // There was an intersection. Split unallocated.
     TRACE_ALLOC(OS::Print("  splitting at %"Pd"\n", free_until));
     LiveRange* tail = unallocated->SplitAt(free_until);
     AddToUnallocated(tail);
   }
 
   registers_[candidate].Add(unallocated);
@@ skipping 82 matching lines @@
       (register_use != NULL) ? register_use->pos()
                              : unallocated->Start();
   if (free_until < register_use_pos) {
     // Can't acquire free register. Spill until we really need one.
     ASSERT(unallocated->Start() < ToInstructionStart(register_use_pos));
     SpillBetween(unallocated, unallocated->Start(), register_use->pos());
     return;
   }
 
   TRACE_ALLOC(OS::Print("assigning blocked register "));
-  TRACE_ALLOC(MakeRegisterLocation(candidate, Location::kDouble).Print());
+  TRACE_ALLOC(MakeRegisterLocation(candidate, kUnboxedDouble).Print());
   TRACE_ALLOC(OS::Print(" to live range v%"Pd" until %"Pd"\n",
                         unallocated->vreg(), blocked_at));
 
   if (blocked_at < unallocated->End()) {
     // Register is blocked before the end of the live range.  Split the range
     // at latest at blocked_at position.
     LiveRange* tail = SplitBetween(unallocated,
                                    unallocated->Start(),
                                    blocked_at + 1);
     AddToUnallocated(tail);
@@ skipping 481 matching lines @@
     } else {
       AddMoveAt(range->Start() + 1,
                 range->spill_slot(),
                 range->assigned_location());
     }
   }
 }
 
 
 void FlowGraphAllocator::CollectRepresentations() {
-  mint_values_ = new BitVector(flow_graph_.max_virtual_register_number());
+  // Parameters.
+  GraphEntryInstr* graph_entry = flow_graph_.graph_entry();
+  for (intptr_t i = 0; i < graph_entry->initial_definitions()->length(); ++i) {
+    Definition* def = (*graph_entry->initial_definitions())[i];
+    value_representations_[def->ssa_temp_index()] = def->representation();
+  }
 
   for (BlockIterator it = flow_graph_.reverse_postorder_iterator();
        !it.Done();
        it.Advance()) {
     BlockEntryInstr* block = it.Current();
-    // TODO(fschneider): Support unboxed mint representation for phis.
+    // Phis.
+    if (block->IsJoinEntry()) {
+      JoinEntryInstr* join = block->AsJoinEntry();
+      for (PhiIterator it(join); !it.Done(); it.Advance()) {
+        PhiInstr* phi = it.Current();
+        if ((phi != NULL) && (phi->ssa_temp_index() >= 0)) {
+          value_representations_[phi->ssa_temp_index()] = phi->representation();
+        }
+      }
+    }
+    // Normal instructions.
     for (ForwardInstructionIterator instr_it(block);
          !instr_it.Done();
          instr_it.Advance()) {
-      Definition* defn = instr_it.Current()->AsDefinition();
-      if ((defn != NULL) &&
-          (defn->ssa_temp_index() >= 0) &&
-          (defn->representation() == kUnboxedMint)) {
-        mint_values_->Add(defn->ssa_temp_index());
+      Definition* def = instr_it.Current()->AsDefinition();
+      if ((def != NULL) && (def->ssa_temp_index() >= 0)) {
+        value_representations_[def->ssa_temp_index()] = def->representation();
       }
     }
   }
 }
 
 
 void FlowGraphAllocator::AllocateRegisters() {
   CollectRepresentations();
 
   EliminateEnvironments();
@@ skipping 61 matching lines @@
     OS::Print("-- [after ssa allocator] ir [%s] -------------\n",
               function.ToFullyQualifiedCString());
     FlowGraphPrinter printer(flow_graph_, true);
     printer.PrintBlocks();
     OS::Print("----------------------------------------------\n");
   }
 }
 
 
 }  // namespace dart