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Side by Side Diff: src/IceInstARM32.cpp

Issue 1284493003: Subzero: Misc fixes/cleanup. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 4 months ago
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1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===// 1 //===- subzero/src/IceInstARM32.cpp - ARM32 instruction implementation ----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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472 (void)Func; 472 (void)Func;
473 llvm_unreachable("Not yet implemented"); 473 llvm_unreachable("Not yet implemented");
474 } 474 }
475 475
476 template <> void InstARM32Vldr::emit(const Cfg *Func) const { 476 template <> void InstARM32Vldr::emit(const Cfg *Func) const {
477 if (!BuildDefs::dump()) 477 if (!BuildDefs::dump())
478 return; 478 return;
479 Ostream &Str = Func->getContext()->getStrEmit(); 479 Ostream &Str = Func->getContext()->getStrEmit();
480 assert(getSrcSize() == 1); 480 assert(getSrcSize() == 1);
481 assert(getDest()->hasReg()); 481 assert(getDest()->hasReg());
482 Str << "\t"<< Opcode << getPredicate() << "\t"; 482 Str << "\t" << Opcode << getPredicate() << "\t";
483 getDest()->emit(Func); 483 getDest()->emit(Func);
484 Str << ", "; 484 Str << ", ";
485 getSrc(0)->emit(Func); 485 getSrc(0)->emit(Func);
486 } 486 }
487 487
488 template <> void InstARM32Vldr::emitIAS(const Cfg *Func) const { 488 template <> void InstARM32Vldr::emitIAS(const Cfg *Func) const {
489 assert(getSrcSize() == 1); 489 assert(getSrcSize() == 1);
490 (void)Func; 490 (void)Func;
491 llvm_unreachable("Not yet implemented"); 491 llvm_unreachable("Not yet implemented");
492 } 492 }
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642 Str << getName(Func) << ":"; 642 Str << getName(Func) << ":";
643 } 643 }
644 644
645 template <> void InstARM32Ldr::emit(const Cfg *Func) const { 645 template <> void InstARM32Ldr::emit(const Cfg *Func) const {
646 if (!BuildDefs::dump()) 646 if (!BuildDefs::dump())
647 return; 647 return;
648 Ostream &Str = Func->getContext()->getStrEmit(); 648 Ostream &Str = Func->getContext()->getStrEmit();
649 assert(getSrcSize() == 1); 649 assert(getSrcSize() == 1);
650 assert(getDest()->hasReg()); 650 assert(getDest()->hasReg());
651 Type Ty = getSrc(0)->getType(); 651 Type Ty = getSrc(0)->getType();
652 Str << "\t"<< Opcode << getWidthString(Ty) << getPredicate() << "\t"; 652 Str << "\t" << Opcode << getWidthString(Ty) << getPredicate() << "\t";
653 getDest()->emit(Func); 653 getDest()->emit(Func);
654 Str << ", "; 654 Str << ", ";
655 getSrc(0)->emit(Func); 655 getSrc(0)->emit(Func);
656 } 656 }
657 657
658 template <> void InstARM32Ldr::emitIAS(const Cfg *Func) const { 658 template <> void InstARM32Ldr::emitIAS(const Cfg *Func) const {
659 assert(getSrcSize() == 1); 659 assert(getSrcSize() == 1);
660 (void)Func; 660 (void)Func;
661 llvm_unreachable("Not yet implemented"); 661 llvm_unreachable("Not yet implemented");
662 } 662 }
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1018 if (getShiftOp() != kNoShift) { 1018 if (getShiftOp() != kNoShift) {
1019 Str << ", " << InstARM32ShiftAttributes[getShiftOp()].EmitString << " "; 1019 Str << ", " << InstARM32ShiftAttributes[getShiftOp()].EmitString << " ";
1020 if (Func) 1020 if (Func)
1021 getShiftAmt()->dump(Func); 1021 getShiftAmt()->dump(Func);
1022 else 1022 else
1023 getShiftAmt()->dump(Str); 1023 getShiftAmt()->dump(Str);
1024 } 1024 }
1025 } 1025 }
1026 1026
1027 } // end of namespace Ice 1027 } // end of namespace Ice
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