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Side by Side Diff: src/compiler/instruction-selector.cc

Issue 1282763002: [turbofan] Drop V8_TURBOFAN_BACKEND and V8_TURBOFAN_TARGET defines. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Created 5 years, 4 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector.h" 5 #include "src/compiler/instruction-selector.h"
6 6
7 #include <limits> 7 #include <limits>
8 8
9 #include "src/base/adapters.h" 9 #include "src/base/adapters.h"
10 #include "src/compiler/instruction-selector-impl.h" 10 #include "src/compiler/instruction-selector-impl.h"
(...skipping 759 matching lines...) Expand 10 before | Expand all | Expand 10 after
770 case IrOpcode::kCheckedStore: 770 case IrOpcode::kCheckedStore:
771 return VisitCheckedStore(node); 771 return VisitCheckedStore(node);
772 default: 772 default:
773 V8_Fatal(__FILE__, __LINE__, "Unexpected operator #%d:%s @ node #%d", 773 V8_Fatal(__FILE__, __LINE__, "Unexpected operator #%d:%s @ node #%d",
774 node->opcode(), node->op()->mnemonic(), node->id()); 774 node->opcode(), node->op()->mnemonic(), node->id());
775 break; 775 break;
776 } 776 }
777 } 777 }
778 778
779 779
780 #if V8_TURBOFAN_BACKEND
781
782 void InstructionSelector::VisitLoadStackPointer(Node* node) { 780 void InstructionSelector::VisitLoadStackPointer(Node* node) {
783 OperandGenerator g(this); 781 OperandGenerator g(this);
784 Emit(kArchStackPointer, g.DefineAsRegister(node)); 782 Emit(kArchStackPointer, g.DefineAsRegister(node));
785 } 783 }
786 784
787 785
788 void InstructionSelector::VisitLoadFramePointer(Node* node) { 786 void InstructionSelector::VisitLoadFramePointer(Node* node) {
789 OperandGenerator g(this); 787 OperandGenerator g(this);
790 Emit(kArchFramePointer, g.DefineAsRegister(node)); 788 Emit(kArchFramePointer, g.DefineAsRegister(node));
791 } 789 }
(...skipping 28 matching lines...) Expand all
820 for (size_t index = 0; index < sw.case_count; ++index) { 818 for (size_t index = 0; index < sw.case_count; ++index) {
821 int32_t value = sw.case_values[index]; 819 int32_t value = sw.case_values[index];
822 BasicBlock* branch = sw.case_branches[index]; 820 BasicBlock* branch = sw.case_branches[index];
823 inputs[index * 2 + 2 + 0] = g.TempImmediate(value); 821 inputs[index * 2 + 2 + 0] = g.TempImmediate(value);
824 inputs[index * 2 + 2 + 1] = g.Label(branch); 822 inputs[index * 2 + 2 + 1] = g.Label(branch);
825 } 823 }
826 Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr); 824 Emit(kArchLookupSwitch, 0, nullptr, input_count, inputs, 0, nullptr);
827 } 825 }
828 826
829 827
830 #endif // V8_TURBOFAN_BACKEND
831
832 // 32 bit targets do not implement the following instructions. 828 // 32 bit targets do not implement the following instructions.
833 #if !V8_TURBOFAN_BACKEND_64 829 #if V8_TARGET_ARCH_32_BIT
834 830
835 void InstructionSelector::VisitWord64And(Node* node) { UNIMPLEMENTED(); } 831 void InstructionSelector::VisitWord64And(Node* node) { UNIMPLEMENTED(); }
836 832
837 833
838 void InstructionSelector::VisitWord64Or(Node* node) { UNIMPLEMENTED(); } 834 void InstructionSelector::VisitWord64Or(Node* node) { UNIMPLEMENTED(); }
839 835
840 836
841 void InstructionSelector::VisitWord64Xor(Node* node) { UNIMPLEMENTED(); } 837 void InstructionSelector::VisitWord64Xor(Node* node) { UNIMPLEMENTED(); }
842 838
843 839
(...skipping 56 matching lines...) Expand 10 before | Expand all | Expand 10 after
900 896
901 void InstructionSelector::VisitChangeUint32ToUint64(Node* node) { 897 void InstructionSelector::VisitChangeUint32ToUint64(Node* node) {
902 UNIMPLEMENTED(); 898 UNIMPLEMENTED();
903 } 899 }
904 900
905 901
906 void InstructionSelector::VisitTruncateInt64ToInt32(Node* node) { 902 void InstructionSelector::VisitTruncateInt64ToInt32(Node* node) {
907 UNIMPLEMENTED(); 903 UNIMPLEMENTED();
908 } 904 }
909 905
910 #endif // V8_TARGET_ARCH_32_BIT && !V8_TARGET_ARCH_X64 && V8_TURBOFAN_BACKEND 906 #endif // V8_TARGET_ARCH_32_BIT
911 907
912 908
913 void InstructionSelector::VisitFinish(Node* node) { 909 void InstructionSelector::VisitFinish(Node* node) {
914 OperandGenerator g(this); 910 OperandGenerator g(this);
915 Node* value = node->InputAt(0); 911 Node* value = node->InputAt(0);
916 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(value)); 912 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(value));
917 } 913 }
918 914
919 915
920 void InstructionSelector::VisitParameter(Node* node) { 916 void InstructionSelector::VisitParameter(Node* node) {
(...skipping 196 matching lines...) Expand 10 before | Expand all | Expand 10 after
1117 inputs->push_back(SlotOrImmediate(&g, input_node.node)); 1113 inputs->push_back(SlotOrImmediate(&g, input_node.node));
1118 descriptor->SetType(value_index++, input_node.type); 1114 descriptor->SetType(value_index++, input_node.type);
1119 } 1115 }
1120 for (StateValuesAccess::TypedNode input_node : StateValuesAccess(stack)) { 1116 for (StateValuesAccess::TypedNode input_node : StateValuesAccess(stack)) {
1121 inputs->push_back(SlotOrImmediate(&g, input_node.node)); 1117 inputs->push_back(SlotOrImmediate(&g, input_node.node));
1122 descriptor->SetType(value_index++, input_node.type); 1118 descriptor->SetType(value_index++, input_node.type);
1123 } 1119 }
1124 DCHECK(value_index == descriptor->GetSize()); 1120 DCHECK(value_index == descriptor->GetSize());
1125 } 1121 }
1126 1122
1127
1128 #if !V8_TURBOFAN_BACKEND
1129
1130 #define DECLARE_UNIMPLEMENTED_SELECTOR(x) \
1131 void InstructionSelector::Visit##x(Node* node) { UNIMPLEMENTED(); }
1132 MACHINE_OP_LIST(DECLARE_UNIMPLEMENTED_SELECTOR)
1133 #undef DECLARE_UNIMPLEMENTED_SELECTOR
1134
1135
1136 void InstructionSelector::VisitCall(Node* node, BasicBlock* handler) {
1137 UNIMPLEMENTED();
1138 }
1139
1140
1141 void InstructionSelector::VisitTailCall(Node* node) { UNIMPLEMENTED(); }
1142
1143
1144 void InstructionSelector::VisitBranch(Node* branch, BasicBlock* tbranch,
1145 BasicBlock* fbranch) {
1146 UNIMPLEMENTED();
1147 }
1148
1149
1150 void InstructionSelector::VisitSwitch(Node* node, const SwitchInfo& sw) {
1151 UNIMPLEMENTED();
1152 }
1153
1154
1155 // static
1156 MachineOperatorBuilder::Flags
1157 InstructionSelector::SupportedMachineOperatorFlags() {
1158 return MachineOperatorBuilder::Flag::kNoFlags;
1159 }
1160
1161 #endif // !V8_TURBOFAN_BACKEND
1162
1163 } // namespace compiler 1123 } // namespace compiler
1164 } // namespace internal 1124 } // namespace internal
1165 } // namespace v8 1125 } // namespace v8
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