Inline memove for small constant sizes and refactor memcpy and memset.

src/IceAssemblerX86BaseImpl.h

Index: src/IceAssemblerX86BaseImpl.h
diff --git a/src/IceAssemblerX86BaseImpl.h b/src/IceAssemblerX86BaseImpl.h
index f78575682cc52f16d87488d694244881dc9b7f68..9f97c75e1c7ca5d07b6a66c3f2faadb2ab93077d 100644
--- a/src/IceAssemblerX86BaseImpl.h
+++ b/src/IceAssemblerX86BaseImpl.h
@@ -3098,6 +3098,29 @@ void AssemblerX86Base<Machine>::xadd(Type Ty,
 }
 
 template <class Machine>
+void AssemblerX86Base<Machine>::xchg(Type Ty, typename Traits::GPRRegister reg0,
+                                     typename Traits::GPRRegister reg1) {
+  AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  if (Ty == IceType_i16)
+    emitOperandSizeOverride();
+  // Use short form if either register is EAX.
+  if (reg0 == Traits::Encoded_Reg_Accumulator) {
+    emitRexB(Ty, reg1);
+    emitUint8(0x90 + gprEncoding(reg1));
+  } else if (reg1 == Traits::Encoded_Reg_Accumulator) {
+    emitRexB(Ty, reg0);
+    emitUint8(0x90 + gprEncoding(reg0));
+  } else {
+    emitRexRB(Ty, reg0, reg1);
+    if (isByteSizedArithType(Ty))
+      emitUint8(0x86);
+    else
+      emitUint8(0x87);
+    emitRegisterOperand(gprEncoding(reg0), gprEncoding(reg1));
+  }
+}
+
+template <class Machine>
 void AssemblerX86Base<Machine>::xchg(Type Ty,
                                      const typename Traits::Address &addr,
                                      typename Traits::GPRRegister reg) {