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| 1 //===- subzero/src/IceInstX86BaseImpl.h - Generic X86 instructions -*- C++ -*=// | 1 //===- subzero/src/IceInstX86BaseImpl.h - Generic X86 instructions -*- C++ -*=// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 3136 Str << ", "; | 3136 Str << ", "; |
| 3137 this->getSrc(0)->emit(Func); | 3137 this->getSrc(0)->emit(Func); |
| 3138 } | 3138 } |
| 3139 | 3139 |
| 3140 template <class Machine> | 3140 template <class Machine> |
| 3141 void InstX86Xchg<Machine>::emitIAS(const Cfg *Func) const { | 3141 void InstX86Xchg<Machine>::emitIAS(const Cfg *Func) const { |
| 3142 assert(this->getSrcSize() == 2); | 3142 assert(this->getSrcSize() == 2); |
| 3143 typename InstX86Base<Machine>::Traits::Assembler *Asm = | 3143 typename InstX86Base<Machine>::Traits::Assembler *Asm = |
| 3144 Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>(); | 3144 Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>(); |
| 3145 Type Ty = this->getSrc(0)->getType(); | 3145 Type Ty = this->getSrc(0)->getType(); |
| 3146 const auto VarReg1 = llvm::cast<Variable>(this->getSrc(1)); |
| 3147 assert(VarReg1->hasReg()); |
| 3148 const typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister Reg1 = |
| 3149 InstX86Base<Machine>::Traits::RegisterSet::getEncodedGPR( |
| 3150 VarReg1->getRegNum()); |
| 3151 |
| 3152 if (const auto VarReg0 = llvm::dyn_cast<Variable>(this->getSrc(0))) { |
| 3153 assert(VarReg0->hasReg()); |
| 3154 const typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister Reg0 = |
| 3155 InstX86Base<Machine>::Traits::RegisterSet::getEncodedGPR( |
| 3156 VarReg0->getRegNum()); |
| 3157 Asm->xchg(Ty, Reg0, Reg1); |
| 3158 return; |
| 3159 } |
| 3160 |
| 3146 const auto Mem = | 3161 const auto Mem = |
| 3147 llvm::cast<typename InstX86Base<Machine>::Traits::X86OperandMem>( | 3162 llvm::cast<typename InstX86Base<Machine>::Traits::X86OperandMem>( |
| 3148 this->getSrc(0)); | 3163 this->getSrc(0)); |
| 3149 assert(Mem->getSegmentRegister() == | 3164 assert(Mem->getSegmentRegister() == |
| 3150 InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment); | 3165 InstX86Base<Machine>::Traits::X86OperandMem::DefaultSegment); |
| 3151 const typename InstX86Base<Machine>::Traits::Address Addr = | 3166 const typename InstX86Base<Machine>::Traits::Address Addr = |
| 3152 Mem->toAsmAddress(Asm); | 3167 Mem->toAsmAddress(Asm); |
| 3153 const auto VarReg = llvm::cast<Variable>(this->getSrc(1)); | 3168 Asm->xchg(Ty, Addr, Reg1); |
| 3154 assert(VarReg->hasReg()); | |
| 3155 const typename InstX86Base<Machine>::Traits::RegisterSet::GPRRegister Reg = | |
| 3156 InstX86Base<Machine>::Traits::RegisterSet::getEncodedGPR( | |
| 3157 VarReg->getRegNum()); | |
| 3158 Asm->xchg(Ty, Addr, Reg); | |
| 3159 } | 3169 } |
| 3160 | 3170 |
| 3161 template <class Machine> | 3171 template <class Machine> |
| 3162 void InstX86Xchg<Machine>::dump(const Cfg *Func) const { | 3172 void InstX86Xchg<Machine>::dump(const Cfg *Func) const { |
| 3163 if (!BuildDefs::dump()) | 3173 if (!BuildDefs::dump()) |
| 3164 return; | 3174 return; |
| 3165 Ostream &Str = Func->getContext()->getStrDump(); | 3175 Ostream &Str = Func->getContext()->getStrDump(); |
| 3166 Type Ty = this->getSrc(0)->getType(); | 3176 Type Ty = this->getSrc(0)->getType(); |
| 3167 Str << "xchg." << Ty << " "; | 3177 Str << "xchg." << Ty << " "; |
| 3168 this->dumpSources(Func); | 3178 this->dumpSources(Func); |
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| 3218 return; | 3228 return; |
| 3219 Ostream &Str = Func->getContext()->getStrDump(); | 3229 Ostream &Str = Func->getContext()->getStrDump(); |
| 3220 Str << "IACA_END"; | 3230 Str << "IACA_END"; |
| 3221 } | 3231 } |
| 3222 | 3232 |
| 3223 } // end of namespace X86Internal | 3233 } // end of namespace X86Internal |
| 3224 | 3234 |
| 3225 } // end of namespace Ice | 3235 } // end of namespace Ice |
| 3226 | 3236 |
| 3227 #endif // SUBZERO_SRC_ICEINSTX86BASEIMPL_H | 3237 #endif // SUBZERO_SRC_ICEINSTX86BASEIMPL_H |
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