| Index: src/arm64/assembler-arm64.cc
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| diff --git a/src/arm64/assembler-arm64.cc b/src/arm64/assembler-arm64.cc
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| index af4eb99527888b1ce76dfbd82fb71c4bf63cd2e3..1cd0e8eb43a06333b4a53d18727e80653ea05d0d 100644
|
| --- a/src/arm64/assembler-arm64.cc
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| +++ b/src/arm64/assembler-arm64.cc
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| @@ -1627,37 +1627,6 @@ void Assembler::LoadStorePair(const CPURegister& rt,
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| }
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|
|
|
|
| -void Assembler::ldnp(const CPURegister& rt,
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| - const CPURegister& rt2,
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| - const MemOperand& src) {
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| - LoadStorePairNonTemporal(rt, rt2, src,
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| - LoadPairNonTemporalOpFor(rt, rt2));
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| -}
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| -
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| -
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| -void Assembler::stnp(const CPURegister& rt,
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| - const CPURegister& rt2,
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| - const MemOperand& dst) {
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| - LoadStorePairNonTemporal(rt, rt2, dst,
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| - StorePairNonTemporalOpFor(rt, rt2));
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| -}
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| -
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| -
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| -void Assembler::LoadStorePairNonTemporal(const CPURegister& rt,
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| - const CPURegister& rt2,
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| - const MemOperand& addr,
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| - LoadStorePairNonTemporalOp op) {
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| - DCHECK(!rt.Is(rt2));
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| - DCHECK(AreSameSizeAndType(rt, rt2));
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| - DCHECK(addr.IsImmediateOffset());
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| - LSDataSize size = CalcLSPairDataSize(
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| - static_cast<LoadStorePairOp>(op & LoadStorePairMask));
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| - DCHECK(IsImmLSPair(addr.offset(), size));
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| - int offset = static_cast<int>(addr.offset());
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| - Emit(op | Rt(rt) | Rt2(rt2) | RnSP(addr.base()) | ImmLSPair(offset, size));
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| -}
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| -
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| -
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| // Memory instructions.
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| void Assembler::ldrb(const Register& rt, const MemOperand& src) {
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| LoadStore(rt, src, LDRB_w);
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|
|