Subzero. Native 64-bit int arithmetic on x86-64.

src/IceTargetLoweringX86Base.h

 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// This file declares the TargetLoweringX86 template class, which
 /// implements the TargetLowering base interface for the x86
 /// architecture.
 ///
 //===----------------------------------------------------------------------===//
 
 #ifndef SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H
 #define SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H
 
 #include "IceDefs.h"
 #include "IceInst.h"
 #include "IceSwitchLowering.h"
 #include "IceTargetLowering.h"
+#include "IceUtils.h"
 
 #include <type_traits>
 #include <unordered_map>
 #include <utility>
 
 namespace Ice {
 namespace X86Internal {
 
 template <class MachineTraits> class BoolFolding;
 
@@ skipping 40 matching lines @@
                                       RegSetMask Exclude) const override;
   const llvm::SmallBitVector &getRegisterSetForType(Type Ty) const override {
     return TypeToRegisterSet[Ty];
   }
   bool hasFramePointer() const override { return IsEbpBasedFrame; }
   SizeT getFrameOrStackReg() const override {
     return IsEbpBasedFrame ? Traits::RegisterSet::Reg_ebp
                            : Traits::RegisterSet::Reg_esp;
   }
   size_t typeWidthInBytesOnStack(Type Ty) const override {
-    // Round up to the next multiple of 4 bytes.  In particular, i1,
-    // i8, and i16 are rounded up to 4 bytes.
-    // TODO(jpp): this needs to round to multiples of 8 bytes in x86-64.
-    return (typeWidthInBytes(Ty) + 3) & ~3;
+    // Round up to the next multiple of WordType bytes.
+    const uint32_t WordSizeInBytes = typeWidthInBytes(Traits::WordType);
+    return Utils::applyAlignment(typeWidthInBytes(Ty), WordSizeInBytes);
   }
 
   SizeT getMinJumpTableSize() const override { return 4; }
 
   void emitVariable(const Variable *Var) const override;
 
   const char *getConstantPrefix() const final { return "$"; }
   void emit(const ConstantUndef *C) const final;
   void emit(const ConstantInteger32 *C) const final;
   void emit(const ConstantInteger64 *C) const final;
   void emit(const ConstantFloat *C) const final;
   void emit(const ConstantDouble *C) const final;
 
   void initNodeForLowering(CfgNode *Node) override;
-  /// Ensure that a 64-bit Variable has been split into 2 32-bit
+  /// x86-32: Ensure that a 64-bit Variable has been split into 2 32-bit
   /// Variables, creating them if necessary.  This is needed for all
   /// I64 operations, and it is needed for pushing F64 arguments for
   /// function calls using the 32-bit push instruction (though the
   /// latter could be done by directly writing to the stack).
-  void split64(Variable *Var);
-  Operand *loOperand(Operand *Operand);
-  Operand *hiOperand(Operand *Operand);
+  ///
+  /// x86-64: Complains loudly if invoked because the cpu can handle
+  /// 64-bit types natively.
+  template <typename T = Traits>
+  typename std::enable_if<!T::Is64Bit, void>::type split64(Variable *Var);
+  template <typename T = Traits>
+  typename std::enable_if<T::Is64Bit, void>::type split64(Variable *) {
+    llvm::report_fatal_error(
+        "Hey, yo! This is x86-64. Watcha doin'? (split64)");
+  }
+
+  template <typename T = Traits>
+  typename std::enable_if<!T::Is64Bit, Operand>::type *
+  loOperand(Operand *Operand);
+  template <typename T = Traits>
+  typename std::enable_if<T::Is64Bit, Operand>::type *loOperand(Operand *) {
+    llvm::report_fatal_error(
+        "Hey, yo! This is x86-64. Watcha doin'? (loOperand)");
+  }
+
+  template <typename T = Traits>
+  typename std::enable_if<!T::Is64Bit, Operand>::type *
+  hiOperand(Operand *Operand);
+  template <typename T = Traits>
+  typename std::enable_if<T::Is64Bit, Operand>::type *hiOperand(Operand *) {
+    llvm::report_fatal_error(
+        "Hey, yo! This is x86-64. Watcha doin'? (hiOperand)");
+  }
+
   void finishArgumentLowering(Variable *Arg, Variable *FramePtr,
                               size_t BasicFrameOffset, size_t &InArgsSizeBytes);
   typename Traits::Address stackVarToAsmOperand(const Variable *Var) const;
 
   typename Traits::InstructionSet getInstructionSet() const {
     return InstructionSet;
   }
   Operand *legalizeUndef(Operand *From, int32_t RegNum = Variable::NoRegister);
 
 protected:
   explicit TargetX86Base(Cfg *Func);
 
   void postLower() override;
 
   void lowerAlloca(const InstAlloca *Inst) override;
   void lowerArithmetic(const InstArithmetic *Inst) override;
   void lowerAssign(const InstAssign *Inst) override;
   void lowerBr(const InstBr *Inst) override;
   void lowerCast(const InstCast *Inst) override;
   void lowerExtractElement(const InstExtractElement *Inst) override;
   void lowerFcmp(const InstFcmp *Inst) override;
   void lowerIcmp(const InstIcmp *Inst) override;
+  /// Complains loudly if invoked because the cpu can handle 64-bit types
+  /// natively.
+  template <typename T = Traits>
+  typename std::enable_if<T::Is64Bit, void>::type
+  lowerIcmp64(const InstIcmp *) {
+    llvm::report_fatal_error(
+        "Hey, yo! This is x86-64. Watcha doin'? (lowerIcmp64)");
+  }
+  /// x86lowerIcmp64 handles 64-bit icmp lowering.
+  template <typename T = Traits>
+  typename std::enable_if<!T::Is64Bit, void>::type
+  lowerIcmp64(const InstIcmp *Inst);
+
   void lowerIntrinsicCall(const InstIntrinsicCall *Inst) override;
   void lowerInsertElement(const InstInsertElement *Inst) override;
   void lowerLoad(const InstLoad *Inst) override;
   void lowerPhi(const InstPhi *Inst) override;
   void lowerSelect(const InstSelect *Inst) override;
   void lowerStore(const InstStore *Inst) override;
   void lowerSwitch(const InstSwitch *Inst) override;
   void lowerUnreachable(const InstUnreachable *Inst) override;
   void lowerOther(const Inst *Instr) override;
   void lowerRMW(const typename Traits::Insts::FakeRMW *RMW);
@@ skipping 481 matching lines @@
   }
 
   BoolFolding FoldingInfo;
 };
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #include "IceTargetLoweringX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H