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Side by Side Diff: src/IceTargetLoweringX8632Traits.h

Issue 1273153002: Subzero. Native 64-bit int arithmetic on x86-64. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Fixes tests & make format Created 5 years, 4 months ago
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1 //===- subzero/src/IceTargetLoweringX8632Traits.h - x86-32 traits -*- C++ -*-=// 1 //===- subzero/src/IceTargetLoweringX8632Traits.h - x86-32 traits -*- C++ -*-=//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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61 using XmmRegister = ::Ice::RegX8632::XmmRegister; 61 using XmmRegister = ::Ice::RegX8632::XmmRegister;
62 using ByteRegister = ::Ice::RegX8632::ByteRegister; 62 using ByteRegister = ::Ice::RegX8632::ByteRegister;
63 using X87STRegister = ::Ice::RegX8632::X87STRegister; 63 using X87STRegister = ::Ice::RegX8632::X87STRegister;
64 64
65 using Cond = ::Ice::CondX86; 65 using Cond = ::Ice::CondX86;
66 66
67 using RegisterSet = ::Ice::RegX8632; 67 using RegisterSet = ::Ice::RegX8632;
68 static const GPRRegister Encoded_Reg_Accumulator = RegX8632::Encoded_Reg_eax; 68 static const GPRRegister Encoded_Reg_Accumulator = RegX8632::Encoded_Reg_eax;
69 static const GPRRegister Encoded_Reg_Counter = RegX8632::Encoded_Reg_ecx; 69 static const GPRRegister Encoded_Reg_Counter = RegX8632::Encoded_Reg_ecx;
70 static const FixupKind PcRelFixup = llvm::ELF::R_386_PC32; 70 static const FixupKind PcRelFixup = llvm::ELF::R_386_PC32;
71 static const FixupKind RelFixup = llvm::ELF::R_386_32;
71 72
72 class Operand { 73 class Operand {
73 public: 74 public:
74 Operand(const Operand &other) 75 Operand(const Operand &other)
75 : fixup_(other.fixup_), length_(other.length_) { 76 : fixup_(other.fixup_), length_(other.length_) {
76 memmove(&encoding_[0], &other.encoding_[0], other.length_); 77 memmove(&encoding_[0], &other.encoding_[0], other.length_);
77 } 78 }
78 79
79 Operand &operator=(const Operand &other) { 80 Operand &operator=(const Operand &other) {
80 length_ = other.length_; 81 length_ = other.length_;
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265 //---------------------------------------------------------------------------- 266 //----------------------------------------------------------------------------
266 enum InstructionSet { 267 enum InstructionSet {
267 Begin, 268 Begin,
268 // SSE2 is the PNaCl baseline instruction set. 269 // SSE2 is the PNaCl baseline instruction set.
269 SSE2 = Begin, 270 SSE2 = Begin,
270 SSE4_1, 271 SSE4_1,
271 End 272 End
272 }; 273 };
273 274
274 static const char *TargetName; 275 static const char *TargetName;
276 static constexpr Type WordType = IceType_i32;
275 277
276 static IceString getRegName(SizeT RegNum, Type Ty) { 278 static IceString getRegName(SizeT RegNum, Type Ty) {
277 assert(RegNum < RegisterSet::Reg_NUM); 279 assert(RegNum < RegisterSet::Reg_NUM);
278 static const char *RegNames8[] = { 280 static const char *RegNames8[] = {
279 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \ 281 #define X(val, encode, name, name16, name8, scratch, preserved, stackptr, \
280 frameptr, isI8, isInt, isFP) \ 282 frameptr, isI8, isInt, isFP) \
281 name8, 283 name8,
282 REGX8632_TABLE 284 REGX8632_TABLE
283 #undef X 285 #undef X
284 }; 286 };
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703 705
704 } // end of namespace X86Internal 706 } // end of namespace X86Internal
705 707
706 namespace X8632 { 708 namespace X8632 {
707 using Traits = ::Ice::X86Internal::MachineTraits<TargetX8632>; 709 using Traits = ::Ice::X86Internal::MachineTraits<TargetX8632>;
708 } // end of namespace X8632 710 } // end of namespace X8632
709 711
710 } // end of namespace Ice 712 } // end of namespace Ice
711 713
712 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632TRAITS_H 714 #endif // SUBZERO_SRC_ICETARGETLOWERINGX8632TRAITS_H
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