| Index: src/opts/SkTextureCompression_opts_neon.cpp
|
| diff --git a/src/opts/SkTextureCompression_opts_neon.cpp b/src/opts/SkTextureCompression_opts_neon.cpp
|
| deleted file mode 100644
|
| index b3b5037b8ca8c948b3ad1c5281607feaba676a86..0000000000000000000000000000000000000000
|
| --- a/src/opts/SkTextureCompression_opts_neon.cpp
|
| +++ /dev/null
|
| @@ -1,239 +0,0 @@
|
| -/*
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| - * Copyright 2014
|
| - *
|
| - * Use of this source code is governed by a BSD-style license that can be
|
| - * found in the LICENSE file.
|
| - */
|
| -
|
| -#include "SkTextureCompressor.h"
|
| -#include "SkTextureCompression_opts.h"
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| -
|
| -#include <arm_neon.h>
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| -
|
| -// Converts indices in each of the four bits of the register from
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| -// 0, 1, 2, 3, 4, 5, 6, 7
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| -// to
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| -// 3, 2, 1, 0, 4, 5, 6, 7
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| -//
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| -// A more detailed explanation can be found in SkTextureCompressor::convert_indices
|
| -static inline uint8x16_t convert_indices(const uint8x16_t &x) {
|
| - static const int8x16_t kThree = {
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| - 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
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| - 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
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| - };
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| -
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| - static const int8x16_t kZero = {
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| - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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| - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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| - };
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| -
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| - // Take top three bits
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| - int8x16_t sx = vreinterpretq_s8_u8(x);
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| -
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| - // Negate ...
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| - sx = vnegq_s8(sx);
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| -
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| - // Add three...
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| - sx = vaddq_s8(sx, kThree);
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| -
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| - // Generate negatives mask
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| - const int8x16_t mask = vreinterpretq_s8_u8(vcltq_s8(sx, kZero));
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| -
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| - // Absolute value
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| - sx = vabsq_s8(sx);
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| -
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| - // Add three to the values that were negative...
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| - return vreinterpretq_u8_s8(vaddq_s8(sx, vandq_s8(mask, kThree)));
|
| -}
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| -
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| -template<unsigned shift>
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| -static inline uint64x2_t shift_swap(const uint64x2_t &x, const uint64x2_t &mask) {
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| - uint64x2_t t = vandq_u64(mask, veorq_u64(x, vshrq_n_u64(x, shift)));
|
| - return veorq_u64(x, veorq_u64(t, vshlq_n_u64(t, shift)));
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| -}
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| -
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| -static inline uint64x2_t pack_indices(const uint64x2_t &x) {
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| - // x: 00 a e 00 b f 00 c g 00 d h 00 i m 00 j n 00 k o 00 l p
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| -
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| - static const uint64x2_t kMask1 = { 0x3FC0003FC00000ULL, 0x3FC0003FC00000ULL };
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| - uint64x2_t ret = shift_swap<10>(x, kMask1);
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| -
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| - // x: b f 00 00 00 a e c g i m 00 00 00 d h j n 00 k o 00 l p
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| - static const uint64x2_t kMask2 = { (0x3FULL << 52), (0x3FULL << 52) };
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| - static const uint64x2_t kMask3 = { (0x3FULL << 28), (0x3FULL << 28) };
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| - const uint64x2_t x1 = vandq_u64(vshlq_n_u64(ret, 52), kMask2);
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| - const uint64x2_t x2 = vandq_u64(vshlq_n_u64(ret, 20), kMask3);
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| - ret = vshrq_n_u64(vorrq_u64(ret, vorrq_u64(x1, x2)), 16);
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| -
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| - // x: 00 00 00 00 00 00 00 00 b f l p a e c g i m k o d h j n
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| -
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| - static const uint64x2_t kMask4 = { 0xFC0000ULL, 0xFC0000ULL };
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| - ret = shift_swap<6>(ret, kMask4);
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| -
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| -#if defined (SK_CPU_BENDIAN)
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| - // x: 00 00 00 00 00 00 00 00 b f l p a e i m c g k o d h j n
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| -
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| - static const uint64x2_t kMask5 = { 0x3FULL, 0x3FULL };
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| - ret = shift_swap<36>(ret, kMask5);
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| -
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| - // x: 00 00 00 00 00 00 00 00 b f j n a e i m c g k o d h l p
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| -
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| - static const uint64x2_t kMask6 = { 0xFFF000000ULL, 0xFFF000000ULL };
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| - ret = shift_swap<12>(ret, kMask6);
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| -#else
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| - // x: 00 00 00 00 00 00 00 00 c g i m d h l p b f j n a e k o
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| -
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| - static const uint64x2_t kMask5 = { 0xFC0ULL, 0xFC0ULL };
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| - ret = shift_swap<36>(ret, kMask5);
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| -
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| - // x: 00 00 00 00 00 00 00 00 a e i m d h l p b f j n c g k o
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| -
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| - static const uint64x2_t kMask6 = { (0xFFFULL << 36), (0xFFFULL << 36) };
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| - static const uint64x2_t kMask7 = { 0xFFFFFFULL, 0xFFFFFFULL };
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| - static const uint64x2_t kMask8 = { 0xFFFULL, 0xFFFULL };
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| - const uint64x2_t y1 = vandq_u64(ret, kMask6);
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| - const uint64x2_t y2 = vshlq_n_u64(vandq_u64(ret, kMask7), 12);
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| - const uint64x2_t y3 = vandq_u64(vshrq_n_u64(ret, 24), kMask8);
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| - ret = vorrq_u64(y1, vorrq_u64(y2, y3));
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| -#endif
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| -
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| - // x: 00 00 00 00 00 00 00 00 a e i m b f j n c g k o d h l p
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| -
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| - // Set the header
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| - static const uint64x2_t kHeader = { 0x8490000000000000ULL, 0x8490000000000000ULL };
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| - return vorrq_u64(kHeader, ret);
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| -}
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| -
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| -// Takes a row of alpha values and places the most significant three bits of each byte into
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| -// the least significant bits of the same byte
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| -static inline uint8x16_t make_index_row(const uint8x16_t &x) {
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| - static const uint8x16_t kTopThreeMask = {
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| - 0xE0, 0xE0, 0xE0, 0xE0, 0xE0, 0xE0, 0xE0, 0xE0,
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| - 0xE0, 0xE0, 0xE0, 0xE0, 0xE0, 0xE0, 0xE0, 0xE0,
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| - };
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| - return vshrq_n_u8(vandq_u8(x, kTopThreeMask), 5);
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| -}
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| -
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| -// Returns true if all of the bits in x are 0.
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| -static inline bool is_zero(uint8x16_t x) {
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| -// First experiments say that this is way slower than just examining the lanes
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| -// but it might need a little more investigation.
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| -#if 0
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| - // This code path tests the system register for overflow. We trigger
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| - // overflow by adding x to a register with all of its bits set. The
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| - // first instruction sets the bits.
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| - int reg;
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| - asm ("VTST.8 %%q0, %q1, %q1\n"
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| - "VQADD.u8 %q1, %%q0\n"
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| - "VMRS %0, FPSCR\n"
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| - : "=r"(reg) : "w"(vreinterpretq_f32_u8(x)) : "q0", "q1");
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| -
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| - // Bit 21 corresponds to the overflow flag.
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| - return reg & (0x1 << 21);
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| -#else
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| - const uint64x2_t cvt = vreinterpretq_u64_u8(x);
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| - const uint64_t l1 = vgetq_lane_u64(cvt, 0);
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| - return (l1 == 0) && (l1 == vgetq_lane_u64(cvt, 1));
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| -#endif
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| -}
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| -
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| -#if defined (SK_CPU_BENDIAN)
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| -static inline uint64x2_t fix_endianness(uint64x2_t x) {
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| - return x;
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| -}
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| -#else
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| -static inline uint64x2_t fix_endianness(uint64x2_t x) {
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| - return vreinterpretq_u64_u8(vrev64q_u8(vreinterpretq_u8_u64(x)));
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| -}
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| -#endif
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| -
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| -static void compress_r11eac_blocks(uint64_t* dst, const uint8_t* src, size_t rowBytes) {
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| -
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| - // Try to avoid switching between vector and non-vector ops...
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| - const uint8_t *const src1 = src;
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| - const uint8_t *const src2 = src + rowBytes;
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| - const uint8_t *const src3 = src + 2*rowBytes;
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| - const uint8_t *const src4 = src + 3*rowBytes;
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| - uint64_t *const dst1 = dst;
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| - uint64_t *const dst2 = dst + 2;
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| -
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| - const uint8x16_t alphaRow1 = vld1q_u8(src1);
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| - const uint8x16_t alphaRow2 = vld1q_u8(src2);
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| - const uint8x16_t alphaRow3 = vld1q_u8(src3);
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| - const uint8x16_t alphaRow4 = vld1q_u8(src4);
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| -
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| - const uint8x16_t cmp12 = vceqq_u8(alphaRow1, alphaRow2);
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| - const uint8x16_t cmp34 = vceqq_u8(alphaRow3, alphaRow4);
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| - const uint8x16_t cmp13 = vceqq_u8(alphaRow1, alphaRow3);
|
| -
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| - const uint8x16_t cmp = vandq_u8(vandq_u8(cmp12, cmp34), cmp13);
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| - const uint8x16_t ncmp = vmvnq_u8(cmp);
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| - const uint8x16_t nAlphaRow1 = vmvnq_u8(alphaRow1);
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| - if (is_zero(ncmp)) {
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| - if (is_zero(alphaRow1)) {
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| - static const uint64x2_t kTransparent = { 0x0020000000002000ULL,
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| - 0x0020000000002000ULL };
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| - vst1q_u64(dst1, kTransparent);
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| - vst1q_u64(dst2, kTransparent);
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| - return;
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| - } else if (is_zero(nAlphaRow1)) {
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| - vst1q_u64(dst1, vreinterpretq_u64_u8(cmp));
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| - vst1q_u64(dst2, vreinterpretq_u64_u8(cmp));
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| - return;
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| - }
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| - }
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| -
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| - const uint8x16_t indexRow1 = convert_indices(make_index_row(alphaRow1));
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| - const uint8x16_t indexRow2 = convert_indices(make_index_row(alphaRow2));
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| - const uint8x16_t indexRow3 = convert_indices(make_index_row(alphaRow3));
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| - const uint8x16_t indexRow4 = convert_indices(make_index_row(alphaRow4));
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| -
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| - const uint64x2_t indexRow12 = vreinterpretq_u64_u8(
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| - vorrq_u8(vshlq_n_u8(indexRow1, 3), indexRow2));
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| - const uint64x2_t indexRow34 = vreinterpretq_u64_u8(
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| - vorrq_u8(vshlq_n_u8(indexRow3, 3), indexRow4));
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| -
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| - const uint32x4x2_t blockIndices = vtrnq_u32(vreinterpretq_u32_u64(indexRow12),
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| - vreinterpretq_u32_u64(indexRow34));
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| - const uint64x2_t blockIndicesLeft = vreinterpretq_u64_u32(vrev64q_u32(blockIndices.val[0]));
|
| - const uint64x2_t blockIndicesRight = vreinterpretq_u64_u32(vrev64q_u32(blockIndices.val[1]));
|
| -
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| - const uint64x2_t indicesLeft = fix_endianness(pack_indices(blockIndicesLeft));
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| - const uint64x2_t indicesRight = fix_endianness(pack_indices(blockIndicesRight));
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| -
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| - const uint64x2_t d1 = vcombine_u64(vget_low_u64(indicesLeft), vget_low_u64(indicesRight));
|
| - const uint64x2_t d2 = vcombine_u64(vget_high_u64(indicesLeft), vget_high_u64(indicesRight));
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| - vst1q_u64(dst1, d1);
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| - vst1q_u64(dst2, d2);
|
| -}
|
| -
|
| -bool CompressA8toR11EAC_NEON(uint8_t* dst, const uint8_t* src,
|
| - int width, int height, size_t rowBytes) {
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| -
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| - // Since we're going to operate on 4 blocks at a time, the src width
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| - // must be a multiple of 16. However, the height only needs to be a
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| - // multiple of 4
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| - if (0 == width || 0 == height || (width % 16) != 0 || (height % 4) != 0) {
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| - return SkTextureCompressor::CompressBufferToFormat(
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| - dst, src,
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| - kAlpha_8_SkColorType,
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| - width, height, rowBytes,
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| - SkTextureCompressor::kR11_EAC_Format, false);
|
| - }
|
| -
|
| - const int blocksX = width >> 2;
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| - const int blocksY = height >> 2;
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| -
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| - SkASSERT((blocksX % 4) == 0);
|
| -
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| - uint64_t* encPtr = reinterpret_cast<uint64_t*>(dst);
|
| - for (int y = 0; y < blocksY; ++y) {
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| - for (int x = 0; x < blocksX; x+=4) {
|
| - // Compress it
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| - compress_r11eac_blocks(encPtr, src + 4*x, rowBytes);
|
| - encPtr += 4;
|
| - }
|
| - src += 4 * rowBytes;
|
| - }
|
| - return true;
|
| -}
|
|
|