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Issue 1272823004: Subzero: Fix an Om1 crash from memset lowering. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Add a comment. Created 5 years, 4 months ago
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1 ; This tests the NaCl intrinsics memset, memcpy and memmove. 1 ; This tests the NaCl intrinsics memset, memcpy and memmove.
2 2
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
4 ; RUN: --target x8632 -i %s --args -O2 -sandbox \ 4 ; RUN: --target x8632 -i %s --args -O2 -sandbox \
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s
6 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 6 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
7 ; RUN: --target x8632 -i %s --args -Om1 -sandbox \ 7 ; RUN: --target x8632 -i %s --args -Om1 -sandbox \
8 ; RUN: | %if --need=target_X8632 --command FileCheck %s 8 ; RUN: | %if --need=target_X8632 --command FileCheck %s
9 9
10 ; RUN: %if --need=target_ARM32 --need=allow_dump \ 10 ; RUN: %if --need=target_ARM32 --need=allow_dump \
(...skipping 83 matching lines...) Expand 10 before | Expand all | Expand 10 after
94 i32 32, i32 1, i1 false) 94 i32 32, i32 1, i1 false)
95 ret void 95 ret void
96 } 96 }
97 ; CHECK-LABEL: test_memset_const_len_align 97 ; CHECK-LABEL: test_memset_const_len_align
98 ; CHECK: movzx 98 ; CHECK: movzx
99 ; CHECK: call {{.*}} R_{{.*}} memset 99 ; CHECK: call {{.*}} R_{{.*}} memset
100 ; ARM32-LABEL: test_memset_const_len_align 100 ; ARM32-LABEL: test_memset_const_len_align
101 ; ARM32: uxtb 101 ; ARM32: uxtb
102 ; ARM32: bl {{.*}} memset 102 ; ARM32: bl {{.*}} memset
103 103
104 define void @test_memset_long_const_len_zero_val_align(i32 %iptr_dst) {
105 entry:
106 %dst = inttoptr i32 %iptr_dst to i8*
107 call void @llvm.memset.p0i8.i32(i8* %dst, i8 0,
108 i32 4876, i32 1, i1 false)
109 ret void
110 }
111 ; CHECK-LABEL: test_memset_long_const_len_zero_val_align
112 ; CHECK: call {{.*}} R_{{.*}} memset
113 ; ARM32-LABEL: test_memset_long_const_len_zero_val_align
114 ; ARM32: uxtb
115 ; ARM32: bl {{.*}} memset
116
104 define void @test_memset_const_val(i32 %iptr_dst, i32 %len) { 117 define void @test_memset_const_val(i32 %iptr_dst, i32 %len) {
105 entry: 118 entry:
106 %dst = inttoptr i32 %iptr_dst to i8* 119 %dst = inttoptr i32 %iptr_dst to i8*
107 call void @llvm.memset.p0i8.i32(i8* %dst, i8 0, i32 %len, i32 1, i1 false) 120 call void @llvm.memset.p0i8.i32(i8* %dst, i8 0, i32 %len, i32 1, i1 false)
108 ret void 121 ret void
109 } 122 }
110 ; CHECK-LABEL: test_memset_const_val 123 ; CHECK-LABEL: test_memset_const_val
111 ; CHECK-NOT: movzx 124 ; CHECK-NOT: movzx
112 ; CHECK: call {{.*}} R_{{.*}} memset 125 ; CHECK: call {{.*}} R_{{.*}} memset
113 ; ARM32-LABEL: test_memset_const_val 126 ; ARM32-LABEL: test_memset_const_val
(...skipping 95 matching lines...) Expand 10 before | Expand all | Expand 10 after
209 } 222 }
210 ; CHECK-LABEL: test_memset_zero_const_len_large 223 ; CHECK-LABEL: test_memset_zero_const_len_large
211 ; CHECK: pxor [[ZERO:xmm[0-9]+]],[[ZERO]] 224 ; CHECK: pxor [[ZERO:xmm[0-9]+]],[[ZERO]]
212 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}+0x10],[[ZERO]] 225 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}+0x10],[[ZERO]]
213 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}],[[ZERO]] 226 ; CHECK-NEXT: movups XMMWORD PTR [{{.*}}],[[ZERO]]
214 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x20],0x0 227 ; CHECK-NEXT: mov BYTE PTR [{{.*}}+0x20],0x0
215 ; CHECK-NOT: mov 228 ; CHECK-NOT: mov
216 ; ARM32-LABEL: test_memset_zero_const_len_large 229 ; ARM32-LABEL: test_memset_zero_const_len_large
217 ; ARM32: uxtb 230 ; ARM32: uxtb
218 ; ARM32: bl {{.*}} memset 231 ; ARM32: bl {{.*}} memset
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