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Side by Side Diff: src/IceTargetLoweringX86BaseImpl.h

Issue 1272823004: Subzero: Fix an Om1 crash from memset lowering. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Add a comment. Created 5 years, 4 months ago
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1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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3797 3797
3798 // Unlikely, but nothing to do if it does happen 3798 // Unlikely, but nothing to do if it does happen
3799 if (IsCountConst && CountValue == 0) 3799 if (IsCountConst && CountValue == 0)
3800 return; 3800 return;
3801 3801
3802 // TODO(ascull): if the count is constant but val is not it would be possible 3802 // TODO(ascull): if the count is constant but val is not it would be possible
3803 // to inline by spreading the value across 4 bytes and accessing subregs e.g. 3803 // to inline by spreading the value across 4 bytes and accessing subregs e.g.
3804 // eax, ax and al. 3804 // eax, ax and al.
3805 if (IsCountConst && IsValConst) { 3805 if (IsCountConst && IsValConst) {
3806 Variable *Base = legalizeToReg(Dest); 3806 Variable *Base = legalizeToReg(Dest);
3807 // Add a FakeUse in case Base is ultimately not used, e.g. it falls back to
3808 // calling memset(). Otherwise Om1 register allocation fails because this
3809 // infinite-weight variable has a definition but no uses.
3810 Context.insert(InstFakeUse::create(Func, Base));
ascull 2015/08/05 23:15:16 I'm doing some refactoring as I'm writing memcpy s
Jim Stichnoth 2015/08/05 23:22:30 That sounds great, thanks! I originally tried to
3807 3811
3808 // 3 is the awkward size as it is too small for the vector or 32-bit 3812 // 3 is the awkward size as it is too small for the vector or 32-bit
3809 // operations and will not work with lowerLeftOvers as there is no valid 3813 // operations and will not work with lowerLeftOvers as there is no valid
3810 // overlap. 3814 // overlap.
3811 if (CountValue == 3) { 3815 if (CountValue == 3) {
3812 Constant *Offset = nullptr; 3816 Constant *Offset = nullptr;
3813 auto *Mem = 3817 auto *Mem =
3814 Traits::X86OperandMem::create(Func, IceType_i16, Base, Offset); 3818 Traits::X86OperandMem::create(Func, IceType_i16, Base, Offset);
3815 _store(Ctx->getConstantInt16((ValValue << 8) | ValValue), Mem); 3819 _store(Ctx->getConstantInt16((ValValue << 8) | ValValue), Mem);
3816 3820
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5402 } 5406 }
5403 // the offset is not eligible for blinding or pooling, return the original 5407 // the offset is not eligible for blinding or pooling, return the original
5404 // mem operand 5408 // mem operand
5405 return MemOperand; 5409 return MemOperand;
5406 } 5410 }
5407 5411
5408 } // end of namespace X86Internal 5412 } // end of namespace X86Internal
5409 } // end of namespace Ice 5413 } // end of namespace Ice
5410 5414
5411 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H 5415 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H
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