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Issue 12716010: Added a version of the v8::HandleScope constructor with an Isolate and use that consistently. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Fixed rest Created 7 years, 9 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
(...skipping 44 matching lines...) Expand 10 before | Expand all | Expand 10 after
55 env = v8::Context::New(); 55 env = v8::Context::New();
56 } 56 }
57 } 57 }
58 58
59 59
60 #define __ assm. 60 #define __ assm.
61 61
62 62
63 TEST(MIPS0) { 63 TEST(MIPS0) {
64 InitializeVM(); 64 InitializeVM();
65 v8::HandleScope scope; 65 Isolate* isolate = Isolate::Current();
66 HandleScope scope(isolate);
66 67
67 MacroAssembler assm(Isolate::Current(), NULL, 0); 68 MacroAssembler assm(isolate, NULL, 0);
68 69
69 // Addition. 70 // Addition.
70 __ addu(v0, a0, a1); 71 __ addu(v0, a0, a1);
71 __ jr(ra); 72 __ jr(ra);
72 __ nop(); 73 __ nop();
73 74
74 CodeDesc desc; 75 CodeDesc desc;
75 assm.GetCode(&desc); 76 assm.GetCode(&desc);
76 Object* code = HEAP->CreateCode( 77 Object* code = HEAP->CreateCode(
77 desc, 78 desc,
78 Code::ComputeFlags(Code::STUB), 79 Code::ComputeFlags(Code::STUB),
79 Handle<Code>())->ToObjectChecked(); 80 Handle<Code>())->ToObjectChecked();
80 CHECK(code->IsCode()); 81 CHECK(code->IsCode());
81 F2 f = FUNCTION_CAST<F2>(Code::cast(code)->entry()); 82 F2 f = FUNCTION_CAST<F2>(Code::cast(code)->entry());
82 int res = reinterpret_cast<int>(CALL_GENERATED_CODE(f, 0xab0, 0xc, 0, 0, 0)); 83 int res = reinterpret_cast<int>(CALL_GENERATED_CODE(f, 0xab0, 0xc, 0, 0, 0));
83 ::printf("f() = %d\n", res); 84 ::printf("f() = %d\n", res);
84 CHECK_EQ(0xabc, res); 85 CHECK_EQ(0xabc, res);
85 } 86 }
86 87
87 88
88 TEST(MIPS1) { 89 TEST(MIPS1) {
89 InitializeVM(); 90 InitializeVM();
90 v8::HandleScope scope; 91 Isolate* isolate = Isolate::Current();
92 HandleScope scope(isolate);
91 93
92 MacroAssembler assm(Isolate::Current(), NULL, 0); 94 MacroAssembler assm(isolate, NULL, 0);
93 Label L, C; 95 Label L, C;
94 96
95 __ mov(a1, a0); 97 __ mov(a1, a0);
96 __ li(v0, 0); 98 __ li(v0, 0);
97 __ b(&C); 99 __ b(&C);
98 __ nop(); 100 __ nop();
99 101
100 __ bind(&L); 102 __ bind(&L);
101 __ addu(v0, v0, a1); 103 __ addu(v0, v0, a1);
102 __ addiu(a1, a1, -1); 104 __ addiu(a1, a1, -1);
(...skipping 15 matching lines...) Expand all
118 CHECK(code->IsCode()); 120 CHECK(code->IsCode());
119 F1 f = FUNCTION_CAST<F1>(Code::cast(code)->entry()); 121 F1 f = FUNCTION_CAST<F1>(Code::cast(code)->entry());
120 int res = reinterpret_cast<int>(CALL_GENERATED_CODE(f, 50, 0, 0, 0, 0)); 122 int res = reinterpret_cast<int>(CALL_GENERATED_CODE(f, 50, 0, 0, 0, 0));
121 ::printf("f() = %d\n", res); 123 ::printf("f() = %d\n", res);
122 CHECK_EQ(1275, res); 124 CHECK_EQ(1275, res);
123 } 125 }
124 126
125 127
126 TEST(MIPS2) { 128 TEST(MIPS2) {
127 InitializeVM(); 129 InitializeVM();
128 v8::HandleScope scope; 130 Isolate* isolate = Isolate::Current();
131 HandleScope scope(isolate);
129 132
130 MacroAssembler assm(Isolate::Current(), NULL, 0); 133 MacroAssembler assm(isolate, NULL, 0);
131 134
132 Label exit, error; 135 Label exit, error;
133 136
134 // ----- Test all instructions. 137 // ----- Test all instructions.
135 138
136 // Test lui, ori, and addiu, used in the li pseudo-instruction. 139 // Test lui, ori, and addiu, used in the li pseudo-instruction.
137 // This way we can then safely load registers with chosen values. 140 // This way we can then safely load registers with chosen values.
138 141
139 __ ori(t0, zero_reg, 0); 142 __ ori(t0, zero_reg, 0);
140 __ lui(t0, 0x1234); 143 __ lui(t0, 0x1234);
(...skipping 118 matching lines...) Expand 10 before | Expand all | Expand 10 after
259 F2 f = FUNCTION_CAST<F2>(Code::cast(code)->entry()); 262 F2 f = FUNCTION_CAST<F2>(Code::cast(code)->entry());
260 int res = reinterpret_cast<int>(CALL_GENERATED_CODE(f, 0xab0, 0xc, 0, 0, 0)); 263 int res = reinterpret_cast<int>(CALL_GENERATED_CODE(f, 0xab0, 0xc, 0, 0, 0));
261 ::printf("f() = %d\n", res); 264 ::printf("f() = %d\n", res);
262 CHECK_EQ(0x31415926, res); 265 CHECK_EQ(0x31415926, res);
263 } 266 }
264 267
265 268
266 TEST(MIPS3) { 269 TEST(MIPS3) {
267 // Test floating point instructions. 270 // Test floating point instructions.
268 InitializeVM(); 271 InitializeVM();
269 v8::HandleScope scope; 272 Isolate* isolate = Isolate::Current();
273 HandleScope scope(isolate);
270 274
271 typedef struct { 275 typedef struct {
272 double a; 276 double a;
273 double b; 277 double b;
274 double c; 278 double c;
275 double d; 279 double d;
276 double e; 280 double e;
277 double f; 281 double f;
278 double g; 282 double g;
279 double h; 283 double h;
280 double i; 284 double i;
281 } T; 285 } T;
282 T t; 286 T t;
283 287
284 // Create a function that accepts &t, and loads, manipulates, and stores 288 // Create a function that accepts &t, and loads, manipulates, and stores
285 // the doubles t.a ... t.f. 289 // the doubles t.a ... t.f.
286 MacroAssembler assm(Isolate::Current(), NULL, 0); 290 MacroAssembler assm(isolate, NULL, 0);
287 Label L, C; 291 Label L, C;
288 292
289 if (CpuFeatures::IsSupported(FPU)) { 293 if (CpuFeatures::IsSupported(FPU)) {
290 CpuFeatureScope scope(&assm, FPU); 294 CpuFeatureScope scope(&assm, FPU);
291 295
292 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) ); 296 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
293 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) ); 297 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
294 __ add_d(f8, f4, f6); 298 __ add_d(f8, f4, f6);
295 __ sdc1(f8, MemOperand(a0, OFFSET_OF(T, c)) ); // c = a + b. 299 __ sdc1(f8, MemOperand(a0, OFFSET_OF(T, c)) ); // c = a + b.
296 300
(...skipping 53 matching lines...) Expand 10 before | Expand all | Expand 10 after
350 CHECK_EQ(120.44, t.f); 354 CHECK_EQ(120.44, t.f);
351 CHECK_EQ(10.97451593465515908537, t.g); 355 CHECK_EQ(10.97451593465515908537, t.g);
352 CHECK_EQ(6.875, t.h); 356 CHECK_EQ(6.875, t.h);
353 } 357 }
354 } 358 }
355 359
356 360
357 TEST(MIPS4) { 361 TEST(MIPS4) {
358 // Test moves between floating point and integer registers. 362 // Test moves between floating point and integer registers.
359 InitializeVM(); 363 InitializeVM();
360 v8::HandleScope scope; 364 Isolate* isolate = Isolate::Current();
365 HandleScope scope(isolate);
361 366
362 typedef struct { 367 typedef struct {
363 double a; 368 double a;
364 double b; 369 double b;
365 double c; 370 double c;
366 } T; 371 } T;
367 T t; 372 T t;
368 373
369 Assembler assm(Isolate::Current(), NULL, 0); 374 Assembler assm(isolate, NULL, 0);
370 Label L, C; 375 Label L, C;
371 376
372 if (CpuFeatures::IsSupported(FPU)) { 377 if (CpuFeatures::IsSupported(FPU)) {
373 CpuFeatureScope scope(&assm, FPU); 378 CpuFeatureScope scope(&assm, FPU);
374 379
375 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) ); 380 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
376 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) ); 381 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
377 382
378 // Swap f4 and f6, by using four integer registers, t0-t3. 383 // Swap f4 and f6, by using four integer registers, t0-t3.
379 __ mfc1(t0, f4); 384 __ mfc1(t0, f4);
(...skipping 30 matching lines...) Expand all
410 CHECK_EQ(2.75e11, t.a); 415 CHECK_EQ(2.75e11, t.a);
411 CHECK_EQ(2.75e11, t.b); 416 CHECK_EQ(2.75e11, t.b);
412 CHECK_EQ(1.5e22, t.c); 417 CHECK_EQ(1.5e22, t.c);
413 } 418 }
414 } 419 }
415 420
416 421
417 TEST(MIPS5) { 422 TEST(MIPS5) {
418 // Test conversions between doubles and integers. 423 // Test conversions between doubles and integers.
419 InitializeVM(); 424 InitializeVM();
420 v8::HandleScope scope; 425 Isolate* isolate = Isolate::Current();
426 HandleScope scope(isolate);
421 427
422 typedef struct { 428 typedef struct {
423 double a; 429 double a;
424 double b; 430 double b;
425 int i; 431 int i;
426 int j; 432 int j;
427 } T; 433 } T;
428 T t; 434 T t;
429 435
430 Assembler assm(Isolate::Current(), NULL, 0); 436 Assembler assm(isolate, NULL, 0);
431 Label L, C; 437 Label L, C;
432 438
433 if (CpuFeatures::IsSupported(FPU)) { 439 if (CpuFeatures::IsSupported(FPU)) {
434 CpuFeatureScope scope(&assm, FPU); 440 CpuFeatureScope scope(&assm, FPU);
435 441
436 // Load all structure elements to registers. 442 // Load all structure elements to registers.
437 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) ); 443 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
438 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) ); 444 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
439 __ lw(t0, MemOperand(a0, OFFSET_OF(T, i)) ); 445 __ lw(t0, MemOperand(a0, OFFSET_OF(T, i)) );
440 __ lw(t1, MemOperand(a0, OFFSET_OF(T, j)) ); 446 __ lw(t1, MemOperand(a0, OFFSET_OF(T, j)) );
(...skipping 40 matching lines...) Expand 10 before | Expand all | Expand 10 after
481 CHECK_EQ(-100000.0, t.b); 487 CHECK_EQ(-100000.0, t.b);
482 CHECK_EQ(15000, t.i); 488 CHECK_EQ(15000, t.i);
483 CHECK_EQ(275000000, t.j); 489 CHECK_EQ(275000000, t.j);
484 } 490 }
485 } 491 }
486 492
487 493
488 TEST(MIPS6) { 494 TEST(MIPS6) {
489 // Test simple memory loads and stores. 495 // Test simple memory loads and stores.
490 InitializeVM(); 496 InitializeVM();
491 v8::HandleScope scope; 497 Isolate* isolate = Isolate::Current();
498 HandleScope scope(isolate);
492 499
493 typedef struct { 500 typedef struct {
494 uint32_t ui; 501 uint32_t ui;
495 int32_t si; 502 int32_t si;
496 int32_t r1; 503 int32_t r1;
497 int32_t r2; 504 int32_t r2;
498 int32_t r3; 505 int32_t r3;
499 int32_t r4; 506 int32_t r4;
500 int32_t r5; 507 int32_t r5;
501 int32_t r6; 508 int32_t r6;
502 } T; 509 } T;
503 T t; 510 T t;
504 511
505 Assembler assm(Isolate::Current(), NULL, 0); 512 Assembler assm(isolate, NULL, 0);
506 Label L, C; 513 Label L, C;
507 514
508 // Basic word load/store. 515 // Basic word load/store.
509 __ lw(t0, MemOperand(a0, OFFSET_OF(T, ui)) ); 516 __ lw(t0, MemOperand(a0, OFFSET_OF(T, ui)) );
510 __ sw(t0, MemOperand(a0, OFFSET_OF(T, r1)) ); 517 __ sw(t0, MemOperand(a0, OFFSET_OF(T, r1)) );
511 518
512 // lh with positive data. 519 // lh with positive data.
513 __ lh(t1, MemOperand(a0, OFFSET_OF(T, ui)) ); 520 __ lh(t1, MemOperand(a0, OFFSET_OF(T, ui)) );
514 __ sw(t1, MemOperand(a0, OFFSET_OF(T, r2)) ); 521 __ sw(t1, MemOperand(a0, OFFSET_OF(T, r2)) );
515 522
(...skipping 37 matching lines...) Expand 10 before | Expand all | Expand 10 after
553 CHECK_EQ(0xffffbbcc, t.r3); 560 CHECK_EQ(0xffffbbcc, t.r3);
554 CHECK_EQ(0x0000bbcc, t.r4); 561 CHECK_EQ(0x0000bbcc, t.r4);
555 CHECK_EQ(0xffffffcc, t.r5); 562 CHECK_EQ(0xffffffcc, t.r5);
556 CHECK_EQ(0x3333bbcc, t.r6); 563 CHECK_EQ(0x3333bbcc, t.r6);
557 } 564 }
558 565
559 566
560 TEST(MIPS7) { 567 TEST(MIPS7) {
561 // Test floating point compare and branch instructions. 568 // Test floating point compare and branch instructions.
562 InitializeVM(); 569 InitializeVM();
563 v8::HandleScope scope; 570 Isolate* isolate = Isolate::Current();
571 HandleScope scope(isolate);
564 572
565 typedef struct { 573 typedef struct {
566 double a; 574 double a;
567 double b; 575 double b;
568 double c; 576 double c;
569 double d; 577 double d;
570 double e; 578 double e;
571 double f; 579 double f;
572 int32_t result; 580 int32_t result;
573 } T; 581 } T;
574 T t; 582 T t;
575 583
576 // Create a function that accepts &t, and loads, manipulates, and stores 584 // Create a function that accepts &t, and loads, manipulates, and stores
577 // the doubles t.a ... t.f. 585 // the doubles t.a ... t.f.
578 MacroAssembler assm(Isolate::Current(), NULL, 0); 586 MacroAssembler assm(isolate, NULL, 0);
579 Label neither_is_nan, less_than, outa_here; 587 Label neither_is_nan, less_than, outa_here;
580 588
581 if (CpuFeatures::IsSupported(FPU)) { 589 if (CpuFeatures::IsSupported(FPU)) {
582 CpuFeatureScope scope(&assm, FPU); 590 CpuFeatureScope scope(&assm, FPU);
583 591
584 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) ); 592 __ ldc1(f4, MemOperand(a0, OFFSET_OF(T, a)) );
585 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) ); 593 __ ldc1(f6, MemOperand(a0, OFFSET_OF(T, b)) );
586 __ c(UN, D, f4, f6); 594 __ c(UN, D, f4, f6);
587 __ bc1f(&neither_is_nan); 595 __ bc1f(&neither_is_nan);
588 __ nop(); 596 __ nop();
(...skipping 45 matching lines...) Expand 10 before | Expand all | Expand 10 after
634 CHECK_EQ(1.5e14, t.a); 642 CHECK_EQ(1.5e14, t.a);
635 CHECK_EQ(2.75e11, t.b); 643 CHECK_EQ(2.75e11, t.b);
636 CHECK_EQ(1, t.result); 644 CHECK_EQ(1, t.result);
637 } 645 }
638 } 646 }
639 647
640 648
641 TEST(MIPS8) { 649 TEST(MIPS8) {
642 // Test ROTR and ROTRV instructions. 650 // Test ROTR and ROTRV instructions.
643 InitializeVM(); 651 InitializeVM();
644 v8::HandleScope scope; 652 Isolate* isolate = Isolate::Current();
653 HandleScope scope(isolate);
645 654
646 typedef struct { 655 typedef struct {
647 int32_t input; 656 int32_t input;
648 int32_t result_rotr_4; 657 int32_t result_rotr_4;
649 int32_t result_rotr_8; 658 int32_t result_rotr_8;
650 int32_t result_rotr_12; 659 int32_t result_rotr_12;
651 int32_t result_rotr_16; 660 int32_t result_rotr_16;
652 int32_t result_rotr_20; 661 int32_t result_rotr_20;
653 int32_t result_rotr_24; 662 int32_t result_rotr_24;
654 int32_t result_rotr_28; 663 int32_t result_rotr_28;
655 int32_t result_rotrv_4; 664 int32_t result_rotrv_4;
656 int32_t result_rotrv_8; 665 int32_t result_rotrv_8;
657 int32_t result_rotrv_12; 666 int32_t result_rotrv_12;
658 int32_t result_rotrv_16; 667 int32_t result_rotrv_16;
659 int32_t result_rotrv_20; 668 int32_t result_rotrv_20;
660 int32_t result_rotrv_24; 669 int32_t result_rotrv_24;
661 int32_t result_rotrv_28; 670 int32_t result_rotrv_28;
662 } T; 671 } T;
663 T t; 672 T t;
664 673
665 MacroAssembler assm(Isolate::Current(), NULL, 0); 674 MacroAssembler assm(isolate, NULL, 0);
666 675
667 // Basic word load. 676 // Basic word load.
668 __ lw(t0, MemOperand(a0, OFFSET_OF(T, input)) ); 677 __ lw(t0, MemOperand(a0, OFFSET_OF(T, input)) );
669 678
670 // ROTR instruction (called through the Ror macro). 679 // ROTR instruction (called through the Ror macro).
671 __ Ror(t1, t0, 0x0004); 680 __ Ror(t1, t0, 0x0004);
672 __ Ror(t2, t0, 0x0008); 681 __ Ror(t2, t0, 0x0008);
673 __ Ror(t3, t0, 0x000c); 682 __ Ror(t3, t0, 0x000c);
674 __ Ror(t4, t0, 0x0010); 683 __ Ror(t4, t0, 0x0010);
675 __ Ror(t5, t0, 0x0014); 684 __ Ror(t5, t0, 0x0014);
(...skipping 62 matching lines...) Expand 10 before | Expand all | Expand 10 after
738 CHECK_EQ(0x56781234, t.result_rotrv_16); 747 CHECK_EQ(0x56781234, t.result_rotrv_16);
739 CHECK_EQ(0x45678123, t.result_rotrv_20); 748 CHECK_EQ(0x45678123, t.result_rotrv_20);
740 CHECK_EQ(0x34567812, t.result_rotrv_24); 749 CHECK_EQ(0x34567812, t.result_rotrv_24);
741 CHECK_EQ(0x23456781, t.result_rotrv_28); 750 CHECK_EQ(0x23456781, t.result_rotrv_28);
742 } 751 }
743 752
744 753
745 TEST(MIPS9) { 754 TEST(MIPS9) {
746 // Test BRANCH improvements. 755 // Test BRANCH improvements.
747 InitializeVM(); 756 InitializeVM();
748 v8::HandleScope scope; 757 Isolate* isolate = Isolate::Current();
758 HandleScope scope(isolate);
749 759
750 MacroAssembler assm(Isolate::Current(), NULL, 0); 760 MacroAssembler assm(isolate, NULL, 0);
751 Label exit, exit2, exit3; 761 Label exit, exit2, exit3;
752 762
753 __ Branch(&exit, ge, a0, Operand(0x00000000)); 763 __ Branch(&exit, ge, a0, Operand(0x00000000));
754 __ Branch(&exit2, ge, a0, Operand(0x00001FFF)); 764 __ Branch(&exit2, ge, a0, Operand(0x00001FFF));
755 __ Branch(&exit3, ge, a0, Operand(0x0001FFFF)); 765 __ Branch(&exit3, ge, a0, Operand(0x0001FFFF));
756 766
757 __ bind(&exit); 767 __ bind(&exit);
758 __ bind(&exit2); 768 __ bind(&exit2);
759 __ bind(&exit3); 769 __ bind(&exit3);
760 __ jr(ra); 770 __ jr(ra);
761 __ nop(); 771 __ nop();
762 772
763 CodeDesc desc; 773 CodeDesc desc;
764 assm.GetCode(&desc); 774 assm.GetCode(&desc);
765 Object* code = HEAP->CreateCode( 775 Object* code = HEAP->CreateCode(
766 desc, 776 desc,
767 Code::ComputeFlags(Code::STUB), 777 Code::ComputeFlags(Code::STUB),
768 Handle<Code>())->ToObjectChecked(); 778 Handle<Code>())->ToObjectChecked();
769 CHECK(code->IsCode()); 779 CHECK(code->IsCode());
770 } 780 }
771 781
772 782
773 TEST(MIPS10) { 783 TEST(MIPS10) {
774 // Test conversions between doubles and long integers. 784 // Test conversions between doubles and long integers.
775 // Test hos the long ints map to FP regs pairs. 785 // Test hos the long ints map to FP regs pairs.
776 InitializeVM(); 786 InitializeVM();
777 v8::HandleScope scope; 787 Isolate* isolate = Isolate::Current();
788 HandleScope scope(isolate);
778 789
779 typedef struct { 790 typedef struct {
780 double a; 791 double a;
781 double b; 792 double b;
782 int32_t dbl_mant; 793 int32_t dbl_mant;
783 int32_t dbl_exp; 794 int32_t dbl_exp;
784 int32_t long_hi; 795 int32_t long_hi;
785 int32_t long_lo; 796 int32_t long_lo;
786 int32_t b_long_hi; 797 int32_t b_long_hi;
787 int32_t b_long_lo; 798 int32_t b_long_lo;
788 } T; 799 } T;
789 T t; 800 T t;
790 801
791 Assembler assm(Isolate::Current(), NULL, 0); 802 Assembler assm(isolate, NULL, 0);
792 Label L, C; 803 Label L, C;
793 804
794 if (CpuFeatures::IsSupported(FPU) && kArchVariant == kMips32r2) { 805 if (CpuFeatures::IsSupported(FPU) && kArchVariant == kMips32r2) {
795 CpuFeatureScope scope(&assm, FPU); 806 CpuFeatureScope scope(&assm, FPU);
796 807
797 // Load all structure elements to registers. 808 // Load all structure elements to registers.
798 __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, a))); 809 __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, a)));
799 810
800 // Save the raw bits of the double. 811 // Save the raw bits of the double.
801 __ mfc1(t0, f0); 812 __ mfc1(t0, f0);
(...skipping 39 matching lines...) Expand 10 before | Expand all | Expand 10 after
841 CHECK_EQ(0x7fffffff, t.long_lo); 852 CHECK_EQ(0x7fffffff, t.long_lo);
842 // 0xFF00FF00FF -> 1.095233372415e12. 853 // 0xFF00FF00FF -> 1.095233372415e12.
843 CHECK_EQ(1.095233372415e12, t.b); 854 CHECK_EQ(1.095233372415e12, t.b);
844 } 855 }
845 } 856 }
846 857
847 858
848 TEST(MIPS11) { 859 TEST(MIPS11) {
849 // Test LWL, LWR, SWL and SWR instructions. 860 // Test LWL, LWR, SWL and SWR instructions.
850 InitializeVM(); 861 InitializeVM();
851 v8::HandleScope scope; 862 Isolate* isolate = Isolate::Current();
863 HandleScope scope(isolate);
852 864
853 typedef struct { 865 typedef struct {
854 int32_t reg_init; 866 int32_t reg_init;
855 int32_t mem_init; 867 int32_t mem_init;
856 int32_t lwl_0; 868 int32_t lwl_0;
857 int32_t lwl_1; 869 int32_t lwl_1;
858 int32_t lwl_2; 870 int32_t lwl_2;
859 int32_t lwl_3; 871 int32_t lwl_3;
860 int32_t lwr_0; 872 int32_t lwr_0;
861 int32_t lwr_1; 873 int32_t lwr_1;
862 int32_t lwr_2; 874 int32_t lwr_2;
863 int32_t lwr_3; 875 int32_t lwr_3;
864 int32_t swl_0; 876 int32_t swl_0;
865 int32_t swl_1; 877 int32_t swl_1;
866 int32_t swl_2; 878 int32_t swl_2;
867 int32_t swl_3; 879 int32_t swl_3;
868 int32_t swr_0; 880 int32_t swr_0;
869 int32_t swr_1; 881 int32_t swr_1;
870 int32_t swr_2; 882 int32_t swr_2;
871 int32_t swr_3; 883 int32_t swr_3;
872 } T; 884 } T;
873 T t; 885 T t;
874 886
875 Assembler assm(Isolate::Current(), NULL, 0); 887 Assembler assm(isolate, NULL, 0);
876 888
877 // Test all combinations of LWL and vAddr. 889 // Test all combinations of LWL and vAddr.
878 __ lw(t0, MemOperand(a0, OFFSET_OF(T, reg_init)) ); 890 __ lw(t0, MemOperand(a0, OFFSET_OF(T, reg_init)) );
879 __ lwl(t0, MemOperand(a0, OFFSET_OF(T, mem_init)) ); 891 __ lwl(t0, MemOperand(a0, OFFSET_OF(T, mem_init)) );
880 __ sw(t0, MemOperand(a0, OFFSET_OF(T, lwl_0)) ); 892 __ sw(t0, MemOperand(a0, OFFSET_OF(T, lwl_0)) );
881 893
882 __ lw(t1, MemOperand(a0, OFFSET_OF(T, reg_init)) ); 894 __ lw(t1, MemOperand(a0, OFFSET_OF(T, reg_init)) );
883 __ lwl(t1, MemOperand(a0, OFFSET_OF(T, mem_init) + 1) ); 895 __ lwl(t1, MemOperand(a0, OFFSET_OF(T, mem_init) + 1) );
884 __ sw(t1, MemOperand(a0, OFFSET_OF(T, lwl_1)) ); 896 __ sw(t1, MemOperand(a0, OFFSET_OF(T, lwl_1)) );
885 897
(...skipping 98 matching lines...) Expand 10 before | Expand all | Expand 10 after
984 996
985 CHECK_EQ(0xaabbccdd, t.swr_0); 997 CHECK_EQ(0xaabbccdd, t.swr_0);
986 CHECK_EQ(0xbbccdd44, t.swr_1); 998 CHECK_EQ(0xbbccdd44, t.swr_1);
987 CHECK_EQ(0xccdd3344, t.swr_2); 999 CHECK_EQ(0xccdd3344, t.swr_2);
988 CHECK_EQ(0xdd223344, t.swr_3); 1000 CHECK_EQ(0xdd223344, t.swr_3);
989 } 1001 }
990 1002
991 1003
992 TEST(MIPS12) { 1004 TEST(MIPS12) {
993 InitializeVM(); 1005 InitializeVM();
994 v8::HandleScope scope; 1006 Isolate* isolate = Isolate::Current();
1007 HandleScope scope(isolate);
995 1008
996 typedef struct { 1009 typedef struct {
997 int32_t x; 1010 int32_t x;
998 int32_t y; 1011 int32_t y;
999 int32_t y1; 1012 int32_t y1;
1000 int32_t y2; 1013 int32_t y2;
1001 int32_t y3; 1014 int32_t y3;
1002 int32_t y4; 1015 int32_t y4;
1003 } T; 1016 } T;
1004 T t; 1017 T t;
1005 1018
1006 MacroAssembler assm(Isolate::Current(), NULL, 0); 1019 MacroAssembler assm(isolate, NULL, 0);
1007 1020
1008 __ mov(t6, fp); // Save frame pointer. 1021 __ mov(t6, fp); // Save frame pointer.
1009 __ mov(fp, a0); // Access struct T by fp. 1022 __ mov(fp, a0); // Access struct T by fp.
1010 __ lw(t0, MemOperand(a0, OFFSET_OF(T, y)) ); 1023 __ lw(t0, MemOperand(a0, OFFSET_OF(T, y)) );
1011 __ lw(t3, MemOperand(a0, OFFSET_OF(T, y4)) ); 1024 __ lw(t3, MemOperand(a0, OFFSET_OF(T, y4)) );
1012 1025
1013 __ addu(t1, t0, t3); 1026 __ addu(t1, t0, t3);
1014 __ subu(t4, t0, t3); 1027 __ subu(t4, t0, t3);
1015 __ nop(); 1028 __ nop();
1016 __ push(t0); // These instructions disappear after opt. 1029 __ push(t0); // These instructions disappear after opt.
(...skipping 58 matching lines...) Expand 10 before | Expand all | Expand 10 after
1075 Object* dummy = CALL_GENERATED_CODE(f, &t, 0, 0, 0, 0); 1088 Object* dummy = CALL_GENERATED_CODE(f, &t, 0, 0, 0, 0);
1076 USE(dummy); 1089 USE(dummy);
1077 1090
1078 CHECK_EQ(3, t.y1); 1091 CHECK_EQ(3, t.y1);
1079 } 1092 }
1080 1093
1081 1094
1082 TEST(MIPS13) { 1095 TEST(MIPS13) {
1083 // Test Cvt_d_uw and Trunc_uw_d macros. 1096 // Test Cvt_d_uw and Trunc_uw_d macros.
1084 InitializeVM(); 1097 InitializeVM();
1085 v8::HandleScope scope; 1098 Isolate* isolate = Isolate::Current();
1099 HandleScope scope(isolate);
1086 1100
1087 typedef struct { 1101 typedef struct {
1088 double cvt_big_out; 1102 double cvt_big_out;
1089 double cvt_small_out; 1103 double cvt_small_out;
1090 uint32_t trunc_big_out; 1104 uint32_t trunc_big_out;
1091 uint32_t trunc_small_out; 1105 uint32_t trunc_small_out;
1092 uint32_t cvt_big_in; 1106 uint32_t cvt_big_in;
1093 uint32_t cvt_small_in; 1107 uint32_t cvt_small_in;
1094 } T; 1108 } T;
1095 T t; 1109 T t;
1096 1110
1097 MacroAssembler assm(Isolate::Current(), NULL, 0); 1111 MacroAssembler assm(isolate, NULL, 0);
1098 1112
1099 if (CpuFeatures::IsSupported(FPU)) { 1113 if (CpuFeatures::IsSupported(FPU)) {
1100 CpuFeatureScope scope(&assm, FPU); 1114 CpuFeatureScope scope(&assm, FPU);
1101 1115
1102 __ sw(t0, MemOperand(a0, OFFSET_OF(T, cvt_small_in))); 1116 __ sw(t0, MemOperand(a0, OFFSET_OF(T, cvt_small_in)));
1103 __ Cvt_d_uw(f10, t0, f22); 1117 __ Cvt_d_uw(f10, t0, f22);
1104 __ sdc1(f10, MemOperand(a0, OFFSET_OF(T, cvt_small_out))); 1118 __ sdc1(f10, MemOperand(a0, OFFSET_OF(T, cvt_small_out)));
1105 1119
1106 __ Trunc_uw_d(f10, f10, f22); 1120 __ Trunc_uw_d(f10, f10, f22);
1107 __ swc1(f10, MemOperand(a0, OFFSET_OF(T, trunc_small_out))); 1121 __ swc1(f10, MemOperand(a0, OFFSET_OF(T, trunc_small_out)));
(...skipping 29 matching lines...) Expand all
1137 CHECK_EQ(static_cast<int>(t.trunc_big_out), static_cast<int>(t.cvt_big_in)); 1151 CHECK_EQ(static_cast<int>(t.trunc_big_out), static_cast<int>(t.cvt_big_in));
1138 CHECK_EQ(static_cast<int>(t.trunc_small_out), 1152 CHECK_EQ(static_cast<int>(t.trunc_small_out),
1139 static_cast<int>(t.cvt_small_in)); 1153 static_cast<int>(t.cvt_small_in));
1140 } 1154 }
1141 } 1155 }
1142 1156
1143 1157
1144 TEST(MIPS14) { 1158 TEST(MIPS14) {
1145 // Test round, floor, ceil, trunc, cvt. 1159 // Test round, floor, ceil, trunc, cvt.
1146 InitializeVM(); 1160 InitializeVM();
1147 v8::HandleScope scope; 1161 Isolate* isolate = Isolate::Current();
1162 HandleScope scope(isolate);
1148 1163
1149 #define ROUND_STRUCT_ELEMENT(x) \ 1164 #define ROUND_STRUCT_ELEMENT(x) \
1150 int32_t x##_up_out; \ 1165 int32_t x##_up_out; \
1151 int32_t x##_down_out; \ 1166 int32_t x##_down_out; \
1152 int32_t neg_##x##_up_out; \ 1167 int32_t neg_##x##_up_out; \
1153 int32_t neg_##x##_down_out; \ 1168 int32_t neg_##x##_down_out; \
1154 uint32_t x##_err1_out; \ 1169 uint32_t x##_err1_out; \
1155 uint32_t x##_err2_out; \ 1170 uint32_t x##_err2_out; \
1156 uint32_t x##_err3_out; \ 1171 uint32_t x##_err3_out; \
1157 uint32_t x##_err4_out; \ 1172 uint32_t x##_err4_out; \
(...skipping 12 matching lines...) Expand all
1170 ROUND_STRUCT_ELEMENT(round) 1185 ROUND_STRUCT_ELEMENT(round)
1171 ROUND_STRUCT_ELEMENT(floor) 1186 ROUND_STRUCT_ELEMENT(floor)
1172 ROUND_STRUCT_ELEMENT(ceil) 1187 ROUND_STRUCT_ELEMENT(ceil)
1173 ROUND_STRUCT_ELEMENT(trunc) 1188 ROUND_STRUCT_ELEMENT(trunc)
1174 ROUND_STRUCT_ELEMENT(cvt) 1189 ROUND_STRUCT_ELEMENT(cvt)
1175 } T; 1190 } T;
1176 T t; 1191 T t;
1177 1192
1178 #undef ROUND_STRUCT_ELEMENT 1193 #undef ROUND_STRUCT_ELEMENT
1179 1194
1180 MacroAssembler assm(Isolate::Current(), NULL, 0); 1195 MacroAssembler assm(isolate, NULL, 0);
1181 1196
1182 if (CpuFeatures::IsSupported(FPU)) { 1197 if (CpuFeatures::IsSupported(FPU)) {
1183 CpuFeatureScope scope(&assm, FPU); 1198 CpuFeatureScope scope(&assm, FPU);
1184 1199
1185 // Save FCSR. 1200 // Save FCSR.
1186 __ cfc1(a1, FCSR); 1201 __ cfc1(a1, FCSR);
1187 // Disable FPU exceptions. 1202 // Disable FPU exceptions.
1188 __ ctc1(zero_reg, FCSR); 1203 __ ctc1(zero_reg, FCSR);
1189 #define RUN_ROUND_TEST(x) \ 1204 #define RUN_ROUND_TEST(x) \
1190 __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, round_up_in))); \ 1205 __ ldc1(f0, MemOperand(a0, OFFSET_OF(T, round_up_in))); \
(...skipping 82 matching lines...) Expand 10 before | Expand all | Expand 10 after
1273 CHECK_ROUND_RESULT(floor); 1288 CHECK_ROUND_RESULT(floor);
1274 CHECK_ROUND_RESULT(ceil); 1289 CHECK_ROUND_RESULT(ceil);
1275 CHECK_ROUND_RESULT(cvt); 1290 CHECK_ROUND_RESULT(cvt);
1276 } 1291 }
1277 } 1292 }
1278 1293
1279 1294
1280 TEST(MIPS15) { 1295 TEST(MIPS15) {
1281 // Test chaining of label usages within instructions (issue 1644). 1296 // Test chaining of label usages within instructions (issue 1644).
1282 InitializeVM(); 1297 InitializeVM();
1283 v8::HandleScope scope; 1298 Isolate* isolate = Isolate::Current();
1284 Assembler assm(Isolate::Current(), NULL, 0); 1299 HandleScope scope(isolate);
1300 Assembler assm(isolate, NULL, 0);
1285 1301
1286 Label target; 1302 Label target;
1287 __ beq(v0, v1, &target); 1303 __ beq(v0, v1, &target);
1288 __ nop(); 1304 __ nop();
1289 __ bne(v0, v1, &target); 1305 __ bne(v0, v1, &target);
1290 __ nop(); 1306 __ nop();
1291 __ bind(&target); 1307 __ bind(&target);
1292 __ nop(); 1308 __ nop();
1293 } 1309 }
1294 1310
1295 #undef __ 1311 #undef __
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