Adds Stop to MIPS. Starts on MIPS call patcher.

runtime/vm/assembler_mips.h

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_MIPS_H_
 #define VM_ASSEMBLER_MIPS_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_mips.h directly; use assembler.h instead.
 #endif
@@ skipping 40 matching lines @@
     offset_ = other.offset_;
     return *this;
   }
 
   uint32_t encoding() const {
     ASSERT(Utils::IsInt(16, offset_));
     uint16_t imm_value = static_cast<uint16_t>(offset_);
     return (base_ << kRsShift) | imm_value;
   }
 
+  static bool CanHoldOffset(int32_t offset) {
+    return Utils::IsInt(16, offset);
+  }
+
  private:
   Register base_;
   int32_t offset_;
 };
 
 
 class FieldAddress : public Address {
  public:
   FieldAddress(Register base, int32_t disp)
       : Address(base, disp - kHeapObjectTag) { }
@@ skipping 65 matching lines @@
  public:
   Assembler()
       : buffer_(),
         object_pool_(GrowableObjectArray::Handle()),
         prologue_offset_(-1),
         delay_slot_available_(false),
         in_delay_slot_(false),
         comments_() { }
   ~Assembler() { }
 
-  void PopRegister(Register r) {
-    UNIMPLEMENTED();
-  }
+  void PopRegister(Register r) { Pop(r); }
 
   void Bind(Label* label);
 
   // Misc. functionality
   int CodeSize() const { return buffer_.Size(); }
   int prologue_offset() const { return -1; }
   const ZoneGrowableArray<int>& GetPointerOffsets() const {
     return buffer_.pointer_offsets();
   }
   const GrowableObjectArray& object_pool() const { return object_pool_; }
@@ skipping 24 matching lines @@
   // Allocated instance is returned in 'instance_reg'.
   // Only the tags field of the object is initialized.
   void TryAllocate(const Class& cls,
                    Label* failure,
                    bool near_jump,
                    Register instance_reg) {
     UNIMPLEMENTED();
   }
 
   // Debugging and bringup support.
-  void Stop(const char* message) { UNIMPLEMENTED(); }
+  void Stop(const char* message);
   void Unimplemented(const char* message);
   void Untested(const char* message);
   void Unreachable(const char* message);
 
   static void InitializeMemoryWithBreakpoints(uword data, int length);
 
   void Comment(const char* format, ...) PRINTF_ATTRIBUTE(2, 3);
 
   const Code::Comments& GetCodeComments() const;
 
@@ skipping 14 matching lines @@
         Instr::kNopInstruction);
     buffer_.Remit<int32_t>();
     delay_slot_available_ = false;
     in_delay_slot_ = true;
     return this;
   }
 
   // CPU instructions in alphabetical order.
   void addiu(Register rt, Register rs, const Immediate& imm) {
     ASSERT(Utils::IsInt(16, imm.value()));
-    uint16_t imm_value = static_cast<uint16_t>(imm.value());
+    const uint16_t imm_value = static_cast<uint16_t>(imm.value());
     EmitIType(ADDIU, rs, rt, imm_value);
   }
 
   void addu(Register rd, Register rs, Register rt) {
     EmitRType(SPECIAL, rs, rt, rd, 0, ADDU);
   }
 
   void and_(Register rd, Register rs, Register rt) {
     EmitRType(SPECIAL, rs, rt, rd, 0, AND);
   }
 
   void andi(Register rt, Register rs, const Immediate& imm) {
     ASSERT(Utils::IsUint(16, imm.value()));
-    uint16_t imm_value = static_cast<uint16_t>(imm.value());
+    const uint16_t imm_value = static_cast<uint16_t>(imm.value());
     EmitIType(ANDI, rs, rt, imm_value);
   }
 
   // Unconditional branch.
   void b(Label* l) {
     beq(R0, R0, l);
   }
 
   // Branch if equal.
   void beq(Register rs, Register rt, Label* l) {
@@ skipping 243 matching lines @@
 
   void sw(Register rt, const Address& addr) {
     EmitLoadStore(SW, rt, addr);
   }
 
   void xor_(Register rd, Register rs, Register rt) {
     EmitRType(SPECIAL, rs, rt, rd, 0, XOR);
   }
 
   // Macros in alphabetical order.
+
+  void Branch(const ExternalLabel* label) {
+    // Doesn't need to be patchable, so use the delay slot.
+    if (Utils::IsInt(16, label->address())) {
+      jr(TMP);
+      delay_slot()->addiu(TMP, ZR, Immediate(label->address()));
+    } else {
+      const uint16_t low = Utils::Low16Bits(label->address());
+      const uint16_t high = Utils::High16Bits(label->address());
+      lui(TMP, Immediate(high));
+      jr(TMP);
+      delay_slot()->ori(TMP, TMP, Immediate(low));
+    }
+  }
+
+  void BranchLink(const ExternalLabel* label) {
+    // Doesn't need to be patchable, so use the delay slot.
+    if (Utils::IsInt(16, label->address())) {
+      jalr(TMP);
+      delay_slot()->addiu(TMP, ZR, Immediate(label->address()));
+    } else {
+      const uint16_t low = Utils::Low16Bits(label->address());
+      const uint16_t high = Utils::High16Bits(label->address());
+      lui(TMP, Immediate(high));
+      jalr(TMP);
+      delay_slot()->ori(TMP, TMP, Immediate(low));
+    }
+  }
+
+  void BranchLinkPatchable(const ExternalLabel* label) {
+    const int32_t offset =
+        Array::data_offset() + 4*AddExternalLabel(label) - kHeapObjectTag;
+    LoadWordFromPoolOffset(TMP, offset);
+    jalr(TMP);
+  }
+
+  void BranchPatchable(const ExternalLabel* label) {
+    LoadImmediate(TMP, label->address());
+    jr(TMP);
+  }
+
+  void Drop(intptr_t stack_elements) {
+    ASSERT(stack_elements >= 0);
+    if (stack_elements > 0) {
+      addiu(SP, SP, Immediate(stack_elements * kWordSize));
+    }
+  }
+
   void LoadImmediate(Register rd, int32_t value) {
     if (Utils::IsInt(16, value)) {
       addiu(rd, ZR, Immediate(value));
     } else {
-      lui(rd, Immediate((value >> 16) & 0xffff));
-      ori(rd, rd, Immediate(value & 0xffff));
+      const uint16_t low = Utils::Low16Bits(value);
+      const uint16_t high = Utils::High16Bits(value);
+      lui(rd, Immediate(high));
+      ori(rd, rd, Immediate(low));
     }
   }
 
+  void Push(Register rt) {
+    addiu(SP, SP, Immediate(-kWordSize));
+    sw(rt, Address(SP));
+  }
+
+  void Pop(Register rt) {
+    lw(rt, Address(SP));
+    addiu(SP, SP, Immediate(kWordSize));
+  }
+
+  void Ret() {
+    jr(RA);
+  }
+
+  void LoadWordFromPoolOffset(Register rd, int32_t offset);
+  void LoadObject(Register rd, const Object& object);
+  void PushObject(const Object& object);
+
+  // Sets register rd to zero if the object is equal to register rn,
+  // set to non-zero otherwise.
+  void CompareObject(Register rd, Register rn, const Object& object);
+
  private:
   AssemblerBuffer buffer_;
   GrowableObjectArray& object_pool_;  // Objects and patchable jump targets.
   int prologue_offset_;
 
   bool delay_slot_available_;
   bool in_delay_slot_;
 
+  int32_t AddObject(const Object& obj);
+  int32_t AddExternalLabel(const ExternalLabel* label);
+
   class CodeComment : public ZoneAllocated {
    public:
     CodeComment(intptr_t pc_offset, const String& comment)
         : pc_offset_(pc_offset), comment_(comment) { }
 
     intptr_t pc_offset() const { return pc_offset_; }
     const String& comment() const { return comment_; }
 
    private:
     intptr_t pc_offset_;
@@ skipping 55 matching lines @@
     Emit(opcode << kOpcodeShift |
          rs << kRsShift |
          rt << kRtShift |
          rd << kRdShift |
          sa << kSaShift |
          func << kFunctionShift);
   }
 
   void EmitBranch(Opcode b, Register rs, Register rt, Label* label) {
     if (label->IsBound()) {
       // Reletive destination from an instruction after the branch.

[regis, 2013/03/26 17:52:35]

ditto

[regis, 2013/03/26 17:52:35]

ditto

-      int32_t dest = label->Position() - (buffer_.Size() + Instr::kInstrSize);
-      uint16_t dest_off = EncodeBranchOffset(dest, 0);
+      const int32_t dest =
+          label->Position() - (buffer_.Size() + Instr::kInstrSize);
+      const uint16_t dest_off = EncodeBranchOffset(dest, 0);
       EmitIType(b, rs, rt, dest_off);
     } else {
-      int position = buffer_.Size();
+      const int position = buffer_.Size();
       EmitIType(b, rs, rt, label->position_);
       label->LinkTo(position);
     }
   }
 
   void EmitRegImmBranch(RtRegImm b, Register rs, Label* label) {
     if (label->IsBound()) {
       // Reletive destination from an instruction after the branch.

[regis, 2013/03/26 17:52:35]

ditto

-      int32_t dest = label->Position() - (buffer_.Size() + Instr::kInstrSize);
-      uint16_t dest_off = EncodeBranchOffset(dest, 0);
+      const int32_t dest =
+          label->Position() - (buffer_.Size() + Instr::kInstrSize);
+      const uint16_t dest_off = EncodeBranchOffset(dest, 0);
       EmitRegImmType(REGIMM, rs, b, dest_off);
     } else {
-      int position = buffer_.Size();
+      const int position = buffer_.Size();
       EmitRegImmType(REGIMM, rs, b, label->position_);
       label->LinkTo(position);
     }
   }
 
   static int32_t EncodeBranchOffset(int32_t offset, int32_t instr);
   static int DecodeBranchOffset(int32_t instr);
 
   void EmitBranchDelayNop() {
     Emit(Instr::kNopInstruction);  // Branch delay NOP.
     delay_slot_available_ = true;
   }
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_MIPS_H_