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Side by Side Diff: src/IceTargetLoweringX86BaseImpl.h

Issue 1266863002: Subzero. Misc X86 fixes. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 4 months ago
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1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==// 1 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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1923 _mov(Dest, T); 1923 _mov(Dest, T);
1924 } 1924 }
1925 break; 1925 break;
1926 case InstArithmetic::Urem: 1926 case InstArithmetic::Urem:
1927 Src1 = legalize(Src1, Legal_Reg | Legal_Mem); 1927 Src1 = legalize(Src1, Legal_Reg | Legal_Mem);
1928 if (isByteSizedArithType(Dest->getType())) { 1928 if (isByteSizedArithType(Dest->getType())) {
1929 Variable *T_eax = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax); 1929 Variable *T_eax = makeReg(IceType_i32, Traits::RegisterSet::Reg_eax);
1930 Context.insert(InstFakeDef::create(Func, T_eax)); 1930 Context.insert(InstFakeDef::create(Func, T_eax));
1931 _xor(T_eax, T_eax); 1931 _xor(T_eax, T_eax);
1932 _mov(T, Src0, Traits::RegisterSet::Reg_eax); 1932 _mov(T, Src0, Traits::RegisterSet::Reg_eax);
1933 Variable *T_al = makeReg(IceType_i8, Traits::RegisterSet::Reg_eax); 1933 _div(T, Src1, T);
1934 _div(T_al, Src1, T);
1935 // shr $8, %eax shifts ah (i.e., the 8 bit remainder) into al. We don't 1934 // shr $8, %eax shifts ah (i.e., the 8 bit remainder) into al. We don't
1936 // mov %ah, %al because it would make x86-64 codegen more complicated. If 1935 // mov %ah, %al because it would make x86-64 codegen more complicated. If
1937 // this ever becomes a problem we can introduce a pseudo rem instruction 1936 // this ever becomes a problem we can introduce a pseudo rem instruction
1938 // that returns the remainder in %al directly (and uses a mov for copying 1937 // that returns the remainder in %al directly (and uses a mov for copying
1939 // %ah to %al.) 1938 // %ah to %al.)
1940 static constexpr uint8_t AlSizeInBits = 8; 1939 static constexpr uint8_t AlSizeInBits = 8;
1941 _shr(T_eax, Ctx->getConstantInt8(AlSizeInBits)); 1940 _shr(T_eax, Ctx->getConstantInt8(AlSizeInBits));
1942 _mov(Dest, T_al); 1941 _mov(Dest, T);
1943 Context.insert(InstFakeUse::create(Func, T_eax)); 1942 Context.insert(InstFakeUse::create(Func, T_eax));
1944 } else { 1943 } else {
1945 Constant *Zero = Ctx->getConstantZero(IceType_i32); 1944 Constant *Zero = Ctx->getConstantZero(IceType_i32);
1946 _mov(T_edx, Zero, Traits::RegisterSet::Reg_edx); 1945 _mov(T_edx, Zero, Traits::RegisterSet::Reg_edx);
1947 _mov(T, Src0, Traits::RegisterSet::Reg_eax); 1946 _mov(T, Src0, Traits::RegisterSet::Reg_eax);
1948 _div(T_edx, Src1, T); 1947 _div(T_edx, Src1, T);
1949 _mov(Dest, T_edx); 1948 _mov(Dest, T_edx);
1950 } 1949 }
1951 break; 1950 break;
1952 case InstArithmetic::Srem: 1951 case InstArithmetic::Srem:
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5643 } 5642 }
5644 // the offset is not eligible for blinding or pooling, return the original 5643 // the offset is not eligible for blinding or pooling, return the original
5645 // mem operand 5644 // mem operand
5646 return MemOperand; 5645 return MemOperand;
5647 } 5646 }
5648 5647
5649 } // end of namespace X86Internal 5648 } // end of namespace X86Internal
5650 } // end of namespace Ice 5649 } // end of namespace Ice
5651 5650
5652 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H 5651 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H
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