Adds branch instructions and labels to the MIPS simulator, assembler, disassembler.

runtime/vm/disassembler_mips.cc

Index: runtime/vm/disassembler_mips.cc
===================================================================
--- runtime/vm/disassembler_mips.cc	(revision 20399)
+++ runtime/vm/disassembler_mips.cc	(working copy)
@@ -39,6 +39,7 @@
 
   void DecodeSpecial(Instr* instr);
   void DecodeSpecial2(Instr* instr);
+  void DecodeRegImm(Instr* instr);
 
   // Convenience functions.
   char* get_buffer() const { return buffer_; }
@@ -137,6 +138,16 @@
       }
       return 4;
     }
+    case 'd': {
+      ASSERT(STRING_STARTS_WITH(format, "dest"));
+      int off = instr->SImmField() << 2;
+      uword destination = reinterpret_cast<uword>(instr) + off;
+      buffer_pos_ += OS::SNPrint(current_position_in_buffer(),
+                                 remaining_size_in_buffer(),
+                                 "%#"Px"",
+                                 destination);
+      return 4;
+    }
     case 'i': {
       ASSERT(STRING_STARTS_WITH(format, "imm"));
       if (format[3] == 'u') {
@@ -359,6 +370,33 @@
 }
 
 
+void MIPSDecoder::DecodeRegImm(Instr* instr) {
+  ASSERT(instr->OpcodeField() == REGIMM);
+  switch (instr->RegImmFnField()) {
+    case BGEZ: {
+      Format(instr, "bgez 'rs, 'dest");
+      break;
+    }
+    case BGEZL: {
+      Format(instr, "bgezl 'rs, 'dest");
+      break;
+    }
+    case BLTZ: {
+      Format(instr, "bltz 'rs, 'dest");
+      break;
+    }
+    case BLTZL: {
+      Format(instr, "bltzl 'rs, 'dest");
+      break;
+    }
+    default: {
+      Unknown(instr);
+      break;
+    }
+  }
+}
+
+
 void MIPSDecoder::InstructionDecode(Instr* instr) {
   switch (instr->OpcodeField()) {
     case SPECIAL: {
@@ -369,6 +407,10 @@
       DecodeSpecial2(instr);
       break;
     }
+    case REGIMM: {
+      DecodeRegImm(instr);
+      break;
+    }
     case ADDIU: {
       Format(instr, "addiu 'rt, 'rs, 'imms");
       break;
@@ -377,6 +419,38 @@
       Format(instr, "andi 'rt, 'rs, 'immu");
       break;
     }
+    case BEQ: {
+      Format(instr, "beq 'rs, 'rt, 'dest");
+      break;
+    }
+    case BEQL: {
+      Format(instr, "beql 'rs, 'rt, 'dest");
+      break;
+    }
+    case BGTZ: {
+      Format(instr, "bgtz 'rs, 'dest");
+      break;
+    }
+    case BGTZL: {
+      Format(instr, "bgtzl 'rs, 'dest");
+      break;
+    }
+    case BLEZ: {
+      Format(instr, "blez 'rs, 'dest");
+      break;
+    }
+    case BLEZL: {
+      Format(instr, "blezl 'rs, 'dest");
+      break;
+    }
+    case BNE: {
+      Format(instr, "bne 'rs, 'rt, 'dest");
+      break;
+    }
+    case BNEL: {
+      Format(instr, "bnel 'rs, 'rt, 'dest");
+      break;
+    }
     case LB: {
       Format(instr, "lb 'rt, 'imms('rs)");
       break;