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Unified Diff: runtime/vm/assembler_mips_test.cc

Issue 12634030: Adds branch instructions and labels to the MIPS simulator, assembler, disassembler. (Closed) Base URL: http://dart.googlecode.com/svn/branches/bleeding_edge/dart/
Patch Set: Created 7 years, 9 months ago
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Index: runtime/vm/assembler_mips_test.cc
===================================================================
--- runtime/vm/assembler_mips_test.cc (revision 20399)
+++ runtime/vm/assembler_mips_test.cc (working copy)
@@ -646,8 +646,351 @@
}
+ASSEMBLER_TEST_GENERATE(Beq_backward, assembler) {
+ Label l;
+
+ __ LoadImmediate(R1, 0);
+ __ LoadImmediate(R2, 1);
+ __ Bind(&l);
+ __ addiu(R1, R1, Immediate(1));
+ __ beq(R1, R2, &l);
+ __ ori(V0, R1, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Beq_backward, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Beq_backward_delay, assembler) {
+ Label l;
+
+ __ LoadImmediate(R1, 0);
+ __ LoadImmediate(R2, 1);
+ __ Bind(&l);
+ __ addiu(R1, R1, Immediate(1));
+ __ beq(R1, R2, &l);
+ __ delay_slot()->addiu(R1, R1, Immediate(1));
+ __ ori(V0, R1, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Beq_backward_delay, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(4, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Beq_forward_taken, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 1);
+ __ LoadImmediate(R6, 1);
+
+ __ LoadImmediate(V0, 42);
+ __ beq(R5, R6, &l);
+ __ LoadImmediate(V0, 0);
+ __ Bind(&l);
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Beq_forward_taken, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Beq_forward_not_taken, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 0);
+ __ LoadImmediate(R6, 1);
+
+ __ LoadImmediate(V0, 42);
+ __ beq(R5, R6, &l);
+ __ LoadImmediate(V0, 0);
+ __ Bind(&l);
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Beq_forward_not_taken, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Beq_forward_taken2, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 1);
+ __ LoadImmediate(R6, 1);
+
+ __ LoadImmediate(V0, 42);
+ __ beq(R5, R6, &l);
+ __ nop();
+ __ nop();
+ __ LoadImmediate(V0, 0);
+ __ Bind(&l);
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Beq_forward_taken2, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Beq_forward_taken_delay, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 1);
+ __ LoadImmediate(R6, 1);
+
+ __ LoadImmediate(V0, 42);
+ __ beq(R5, R6, &l);
+ __ delay_slot()->ori(V0, V0, Immediate(1));
+ __ LoadImmediate(V0, 0);
+ __ Bind(&l);
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Beq_forward_taken_delay, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(43, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Beq_forward_not_taken_delay, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 0);
+ __ LoadImmediate(R6, 1);
+
+ __ LoadImmediate(V0, 42);
+ __ beq(R5, R6, &l);
+ __ delay_slot()->ori(V0, V0, Immediate(1));
+ __ addiu(V0, V0, Immediate(1));
+ __ Bind(&l);
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Beq_forward_not_taken_delay, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(44, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Beql_backward_delay, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 0);
+ __ LoadImmediate(R6, 1);
+ __ Bind(&l);
+ __ addiu(R5, R5, Immediate(1));
+ __ beql(R5, R6, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Beql_backward_delay, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Bgez, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 3);
+ __ Bind(&l);
+ __ bgez(R5, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(-1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Bgez, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(-2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Bgezl, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 3);
+ __ Bind(&l);
+ __ bgezl(R5, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(-1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Bgezl, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Blez, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, -3);
+ __ Bind(&l);
+ __ blez(R5, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Blez, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Blezl, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, -3);
+ __ Bind(&l);
+ __ blezl(R5, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Blezl, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Bgtz, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 3);
+ __ Bind(&l);
+ __ bgtz(R5, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(-1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Bgtz, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Bgtzl, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 3);
+ __ Bind(&l);
+ __ bgtzl(R5, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(-1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Bgtzl, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Bltz, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, -3);
+ __ Bind(&l);
+ __ bltz(R5, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Bltz, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Bltzl, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, -3);
+ __ Bind(&l);
+ __ bltzl(R5, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Bltzl, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Bne, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 3);
+ __ Bind(&l);
+ __ bne(R5, R0, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(-1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Bne, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(-1, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Bnel, assembler) {
+ Label l;
+
+ __ LoadImmediate(R5, 3);
+ __ Bind(&l);
+ __ bnel(R5, R0, &l);
+ __ delay_slot()->addiu(R5, R5, Immediate(-1));
+ __ ori(V0, R5, Immediate(0));
+ __ jr(RA);
+}
+
+
+ASSEMBLER_TEST_RUN(Bnel, test) {
+ typedef int (*SimpleCode)();
+ EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+}
+
+
ASSEMBLER_TEST_GENERATE(Jalr_delay, assembler) {
- __ Move(R2, RA);
+ __ mov(R2, RA);
__ jalr(R2, RA);
__ delay_slot()->ori(V0, ZR, Immediate(42));
}
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