Subzero: Fix x86 lowering for shift-by-relocatable-constant.

tests_lit/llvm2ice_tests/arith.ll

Index: tests_lit/llvm2ice_tests/arith.ll
diff --git a/tests_lit/llvm2ice_tests/arith.ll b/tests_lit/llvm2ice_tests/arith.ll
index 3fbdab6d09e90d8f363f3174fdaa53eac622ece5..3027ee28fb552934ebdff36cc8591c7118a38e24 100644
--- a/tests_lit/llvm2ice_tests/arith.ll
+++ b/tests_lit/llvm2ice_tests/arith.ll
@@ -207,3 +207,35 @@ entry:
 ; ARM32HWDIV: bne
 ; ARM32HWDIV: udiv
 ; ARM32HWDIV: mls
+
+; The following tests check that shift instructions don't try to use a
+; ConstantRelocatable as an immediate operand.
+
+@G = internal global [4 x i8] zeroinitializer, align 4
+
+define i32 @ShlReloc(i32 %a) {
+entry:
+  %opnd = ptrtoint [4 x i8]* @G to i32
+  %result = shl i32 %a, %opnd
+  ret i32 %result
+}
+; CHECK-LABEL: ShlReloc
+; CHECK: shl {{.*}},cl

[jvoung (off chromium), 2015/08/04 21:21:51]

Yeah I agree with the reloc awkwardness, especially since the operand is
restricted to 8-bit reg or 8-bit imm =/

+
+define i32 @LshrReloc(i32 %a) {
+entry:
+  %opnd = ptrtoint [4 x i8]* @G to i32
+  %result = lshr i32 %a, %opnd
+  ret i32 %result
+}
+; CHECK-LABEL: LshrReloc
+; CHECK: shr {{.*}},cl
+
+define i32 @AshrReloc(i32 %a) {
+entry:
+  %opnd = ptrtoint [4 x i8]* @G to i32
+  %result = ashr i32 %a, %opnd
+  ret i32 %result
+}
+; CHECK-LABEL: AshrReloc
+; CHECK: sar {{.*}},cl