Subzero: Fix x86 lowering for shift-by-relocatable-constant.

tests_lit/llvm2ice_tests/arith.ll

 ; Assembly test for simple arithmetic operations.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -O2 \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 
 ; TODO(jvoung): Stop skipping unimplemented parts (via --skip-unimplemented)
 ; once enough infrastructure is in. Also, switch to --filetype=obj
 ; when possible.
 ; RUN: %if --need=target_ARM32 --need=allow_dump \
@@ skipping 189 matching lines @@
 ;
 ; ARM32-LABEL: Urem
 ; ARM32: tst [[DENOM:r.*]], [[DENOM]]
 ; ARM32: bne
 ; ARM32: bl {{.*}} __umodsi3
 ; ARM32HWDIV-LABEL: Urem
 ; ARM32HWDIV: tst
 ; ARM32HWDIV: bne
 ; ARM32HWDIV: udiv
 ; ARM32HWDIV: mls
+
+; The following tests check that shift instructions don't try to use a
+; ConstantRelocatable as an immediate operand.
+
+@G = internal global [4 x i8] zeroinitializer, align 4
+
+define i32 @ShlReloc(i32 %a) {
+entry:
+  %opnd = ptrtoint [4 x i8]* @G to i32
+  %result = shl i32 %a, %opnd
+  ret i32 %result
+}
+; CHECK-LABEL: ShlReloc
+; CHECK: shl {{.*}},cl

[jvoung (off chromium), 2015/08/04 21:21:51]

Yeah I agree with the reloc awkwardness, especially since the operand is
restricted to 8-bit reg or 8-bit imm =/

+
+define i32 @LshrReloc(i32 %a) {
+entry:
+  %opnd = ptrtoint [4 x i8]* @G to i32
+  %result = lshr i32 %a, %opnd
+  ret i32 %result
+}
+; CHECK-LABEL: LshrReloc
+; CHECK: shr {{.*}},cl
+
+define i32 @AshrReloc(i32 %a) {
+entry:
+  %opnd = ptrtoint [4 x i8]* @G to i32
+  %result = ashr i32 %a, %opnd
+  ret i32 %result
+}
+; CHECK-LABEL: AshrReloc
+; CHECK: sar {{.*}},cl