Subzero: Fix x86 lowering for shift-by-relocatable-constant.

src/IceTargetLoweringX86BaseImpl.h

 //===- subzero/src/IceTargetLoweringX86BaseImpl.h - x86 lowering -*- C++ -*-==//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 1817 matching lines @@
       _mov(T, Src0, Traits::RegisterSet::Reg_eax);
       Src1 = legalize(Src1, Legal_Reg | Legal_Mem);
     } else {
       _mov(T, Src0);
     }
     _imul(T, Src1);
     _mov(Dest, T);
     break;
   case InstArithmetic::Shl:
     _mov(T, Src0);
-    if (!llvm::isa<Constant>(Src1))
+    if (!llvm::isa<ConstantInteger32>(Src1))
       Src1 = legalizeToReg(Src1, Traits::RegisterSet::Reg_ecx);
     _shl(T, Src1);
     _mov(Dest, T);
     break;
   case InstArithmetic::Lshr:
     _mov(T, Src0);
-    if (!llvm::isa<Constant>(Src1))
+    if (!llvm::isa<ConstantInteger32>(Src1))
       Src1 = legalizeToReg(Src1, Traits::RegisterSet::Reg_ecx);
     _shr(T, Src1);
     _mov(Dest, T);
     break;
   case InstArithmetic::Ashr:
     _mov(T, Src0);
-    if (!llvm::isa<Constant>(Src1))
+    if (!llvm::isa<ConstantInteger32>(Src1))
       Src1 = legalizeToReg(Src1, Traits::RegisterSet::Reg_ecx);
     _sar(T, Src1);
     _mov(Dest, T);
     break;
   case InstArithmetic::Udiv:
     // div and idiv are the few arithmetic operators that do not allow
     // immediates as the operand.
     Src1 = legalize(Src1, Legal_Reg | Legal_Mem);
     if (isByteSizedArithType(Dest->getType())) {
       // For 8-bit unsigned division we need to zero-extend al into ah. A mov
@@ skipping 3609 matching lines @@
   }
   // the offset is not eligible for blinding or pooling, return the original
   // mem operand
   return MemOperand;
 }
 
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASEIMPL_H