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| 1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
| 3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
| 4 | 4 |
| 5 #include "src/v8.h" | 5 #include "src/v8.h" |
| 6 | 6 |
| 7 #if V8_TARGET_ARCH_PPC | 7 #if V8_TARGET_ARCH_PPC |
| 8 | 8 |
| 9 #include "src/codegen.h" | 9 #include "src/codegen.h" |
| 10 #include "src/ic/ic.h" | 10 #include "src/ic/ic.h" |
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| 434 __ LoadRoot(ip, Heap::kHashTableMapRootIndex); | 434 __ LoadRoot(ip, Heap::kHashTableMapRootIndex); |
| 435 __ cmp(r7, ip); | 435 __ cmp(r7, ip); |
| 436 __ beq(&probe_dictionary); | 436 __ beq(&probe_dictionary); |
| 437 | 437 |
| 438 | 438 |
| 439 // The handlers in the stub cache expect a vector and slot. Since we won't | 439 // The handlers in the stub cache expect a vector and slot. Since we won't |
| 440 // change the IC from any downstream misses, a dummy vector can be used. | 440 // change the IC from any downstream misses, a dummy vector can be used. |
| 441 Register vector = LoadWithVectorDescriptor::VectorRegister(); | 441 Register vector = LoadWithVectorDescriptor::VectorRegister(); |
| 442 Register slot = LoadWithVectorDescriptor::SlotRegister(); | 442 Register slot = LoadWithVectorDescriptor::SlotRegister(); |
| 443 DCHECK(!AreAliased(vector, slot, r7, r8, r9, r10)); | 443 DCHECK(!AreAliased(vector, slot, r7, r8, r9, r10)); |
| 444 Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast( | 444 Handle<TypeFeedbackVector> dummy_vector = |
| 445 masm->isolate()->factory()->keyed_load_dummy_vector()); | 445 TypeFeedbackVector::DummyVector(masm->isolate()); |
| 446 int slot_index = dummy_vector->GetIndex(FeedbackVectorICSlot(0)); | 446 int slot_index = dummy_vector->GetIndex( |
| 447 __ LoadRoot(vector, Heap::kKeyedLoadDummyVectorRootIndex); | 447 FeedbackVectorICSlot(TypeFeedbackVector::kDummyKeyedLoadICSlot)); |
| 448 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); |
| 448 __ LoadSmiLiteral(slot, Smi::FromInt(slot_index)); | 449 __ LoadSmiLiteral(slot, Smi::FromInt(slot_index)); |
| 449 | 450 |
| 450 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( | 451 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( |
| 451 Code::ComputeHandlerFlags(Code::LOAD_IC)); | 452 Code::ComputeHandlerFlags(Code::LOAD_IC)); |
| 452 masm->isolate()->stub_cache()->GenerateProbe( | 453 masm->isolate()->stub_cache()->GenerateProbe( |
| 453 masm, Code::KEYED_LOAD_IC, flags, false, receiver, key, r7, r8, r9, r10); | 454 masm, Code::KEYED_LOAD_IC, flags, false, receiver, key, r7, r8, r9, r10); |
| 454 // Cache miss. | 455 // Cache miss. |
| 455 GenerateMiss(masm); | 456 GenerateMiss(masm); |
| 456 | 457 |
| 457 // Do a quick inline probe of the receiver's dictionary, if it | 458 // Do a quick inline probe of the receiver's dictionary, if it |
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| 706 __ LoadP(r7, FieldMemOperand(key, HeapObject::kMapOffset)); | 707 __ LoadP(r7, FieldMemOperand(key, HeapObject::kMapOffset)); |
| 707 __ lbz(r7, FieldMemOperand(r7, Map::kInstanceTypeOffset)); | 708 __ lbz(r7, FieldMemOperand(r7, Map::kInstanceTypeOffset)); |
| 708 __ JumpIfNotUniqueNameInstanceType(r7, &slow); | 709 __ JumpIfNotUniqueNameInstanceType(r7, &slow); |
| 709 | 710 |
| 710 if (FLAG_vector_stores) { | 711 if (FLAG_vector_stores) { |
| 711 // The handlers in the stub cache expect a vector and slot. Since we won't | 712 // The handlers in the stub cache expect a vector and slot. Since we won't |
| 712 // change the IC from any downstream misses, a dummy vector can be used. | 713 // change the IC from any downstream misses, a dummy vector can be used. |
| 713 Register vector = VectorStoreICDescriptor::VectorRegister(); | 714 Register vector = VectorStoreICDescriptor::VectorRegister(); |
| 714 Register slot = VectorStoreICDescriptor::SlotRegister(); | 715 Register slot = VectorStoreICDescriptor::SlotRegister(); |
| 715 DCHECK(!AreAliased(vector, slot, r6, r7, r8, r9)); | 716 DCHECK(!AreAliased(vector, slot, r6, r7, r8, r9)); |
| 716 Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast( | 717 Handle<TypeFeedbackVector> dummy_vector = |
| 717 masm->isolate()->factory()->keyed_store_dummy_vector()); | 718 TypeFeedbackVector::DummyVector(masm->isolate()); |
| 718 int slot_index = dummy_vector->GetIndex(FeedbackVectorICSlot(0)); | 719 int slot_index = dummy_vector->GetIndex( |
| 719 __ LoadRoot(vector, Heap::kKeyedStoreDummyVectorRootIndex); | 720 FeedbackVectorICSlot(TypeFeedbackVector::kDummyKeyedStoreICSlot)); |
| 721 __ LoadRoot(vector, Heap::kDummyVectorRootIndex); |
| 720 __ LoadSmiLiteral(slot, Smi::FromInt(slot_index)); | 722 __ LoadSmiLiteral(slot, Smi::FromInt(slot_index)); |
| 721 } | 723 } |
| 722 | 724 |
| 723 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( | 725 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( |
| 724 Code::ComputeHandlerFlags(Code::STORE_IC)); | 726 Code::ComputeHandlerFlags(Code::STORE_IC)); |
| 725 masm->isolate()->stub_cache()->GenerateProbe( | 727 masm->isolate()->stub_cache()->GenerateProbe( |
| 726 masm, Code::STORE_IC, flags, false, receiver, key, r6, r7, r8, r9); | 728 masm, Code::STORE_IC, flags, false, receiver, key, r6, r7, r8, r9); |
| 727 // Cache miss. | 729 // Cache miss. |
| 728 __ b(&miss); | 730 __ b(&miss); |
| 729 | 731 |
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| 919 patcher.EmitCondition(ne); | 921 patcher.EmitCondition(ne); |
| 920 } else { | 922 } else { |
| 921 DCHECK(Assembler::GetCondition(branch_instr) == ne); | 923 DCHECK(Assembler::GetCondition(branch_instr) == ne); |
| 922 patcher.EmitCondition(eq); | 924 patcher.EmitCondition(eq); |
| 923 } | 925 } |
| 924 } | 926 } |
| 925 } // namespace internal | 927 } // namespace internal |
| 926 } // namespace v8 | 928 } // namespace v8 |
| 927 | 929 |
| 928 #endif // V8_TARGET_ARCH_PPC | 930 #endif // V8_TARGET_ARCH_PPC |
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