Index: test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc |
diff --git a/test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc b/test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc |
index 7e67b31616292c8287e86d7b5ae15dbb87d1ac88..71c2d44d2f51722fe2bf6fec1dd2a5f7390006ec 100644 |
--- a/test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc |
+++ b/test/unittests/compiler/arm64/instruction-selector-arm64-unittest.cc |
@@ -2421,6 +2421,40 @@ TEST_F(InstructionSelectorTest, Word32EqualWithSignedExtendHalfword) { |
} |
+TEST_F(InstructionSelectorTest, Word32EqualZeroWithWord32Equal) { |
+ { |
+ StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32); |
+ Node* const p0 = m.Parameter(0); |
+ Node* const p1 = m.Parameter(1); |
+ m.Return(m.Word32Equal(m.Word32Equal(p0, p1), m.Int32Constant(0))); |
+ Stream s = m.Build(); |
+ ASSERT_EQ(1U, s.size()); |
+ EXPECT_EQ(kArm64Cmp32, s[0]->arch_opcode()); |
+ ASSERT_EQ(2U, s[0]->InputCount()); |
+ EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); |
+ EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1))); |
+ EXPECT_EQ(1U, s[0]->OutputCount()); |
+ EXPECT_EQ(kFlags_set, s[0]->flags_mode()); |
+ EXPECT_EQ(kNotEqual, s[0]->flags_condition()); |
+ } |
+ { |
+ StreamBuilder m(this, kMachInt32, kMachInt32, kMachInt32); |
+ Node* const p0 = m.Parameter(0); |
+ Node* const p1 = m.Parameter(1); |
+ m.Return(m.Word32Equal(m.Int32Constant(0), m.Word32Equal(p0, p1))); |
+ Stream s = m.Build(); |
+ ASSERT_EQ(1U, s.size()); |
+ EXPECT_EQ(kArm64Cmp32, s[0]->arch_opcode()); |
+ ASSERT_EQ(2U, s[0]->InputCount()); |
+ EXPECT_EQ(s.ToVreg(p0), s.ToVreg(s[0]->InputAt(0))); |
+ EXPECT_EQ(s.ToVreg(p1), s.ToVreg(s[0]->InputAt(1))); |
+ EXPECT_EQ(1U, s[0]->OutputCount()); |
+ EXPECT_EQ(kFlags_set, s[0]->flags_mode()); |
+ EXPECT_EQ(kNotEqual, s[0]->flags_condition()); |
+ } |
+} |
+ |
+ |
// ----------------------------------------------------------------------------- |
// Miscellaneous |