Subzero. Removes references to %ah.

src/IceInstX8664.def

 //===- subzero/src/IceInstX8664.def - X-macros for x86-64 insts -*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 // This file defines properties of lowered x86-64 instructions in the
@@ skipping 44 matching lines @@
   X(Reg_xmm13, = Reg_xmm0 + 13, "xmm13", "", "", "", 1, 0, 0, 0, 0, 1)         \
   X(Reg_xmm14, = Reg_xmm0 + 14, "xmm14", "", "", "", 1, 0, 0, 0, 0, 1)         \
   X(Reg_xmm15, = Reg_xmm0 + 15, "xmm15", "", "", "", 1, 0, 0, 0, 0, 1)
 //#define X(val, encode, name, name32, name16, name8, scratch, preserved,
 //          stackptr, frameptr, isI8, isInt, isFP)
 
 // We also provide a combined table, so that there is a namespace where
 // all of the registers are considered and have distinct numberings.
 // This is in contrast to the above, where the "encode" is based on how
 // the register numbers will be encoded in binaries and values can overlap.
-// We don't want the register allocator choosing Reg_ah, in particular
-// for lowering insertelement to pinsrb where internally we use an
-// 8-bit operand but externally pinsrb uses a 32-bit register, in
-// which Reg_ah doesn't map to eax.
 #define REGX8664_TABLE                                                         \
   /* val, encode, name64, name, name16, name8, scratch, preserved,             \
      stackptr, frameptr, isInt, isFP */                                        \
   REGX8664_GPR_TABLE                                                           \
-  X(Reg_ah, = Reg_rax + 4, "?ah", "?ah", "?ah", "ah", 0, 0, 0, 0, 0, 0)        \
   REGX8664_XMM_TABLE
 //#define X(val, encode, name, name32, name16, name8, scratch, preserved,
 //          stackptr, frameptr, isI8, isInt, isFP)
 
 #define REGX8664_TABLE_BOUNDS                                                  \
   /* val         , init */                                                     \
   X(Reg_GPR_First, = Reg_rax  )                                                \
   X(Reg_GPR_Last , = Reg_r15  )                                                \
   X(Reg_XMM_First, = Reg_xmm0 )                                                \
   X(Reg_XMM_Last , = Reg_xmm15)
@@ skipping 67 matching lines @@
   X(IceType_v4i1 , IceType_i32 , "?" , ""  , "d" , ""   , "" )                 \
   X(IceType_v8i1 , IceType_i16 , "?" , ""  , "w" , ""   , "" )                 \
   X(IceType_v16i1, IceType_i8  , "?" , ""  , "b" , ""   , "" )                 \
   X(IceType_v16i8, IceType_i8  , "?" , ""  , "b" , ""   , "" )                 \
   X(IceType_v8i16, IceType_i16 , "?" , ""  , "w" , ""   , "" )                 \
   X(IceType_v4i32, IceType_i32 , "dq", ""  , "d" , ""   , "" )                 \
   X(IceType_v4f32, IceType_f32 , "ps", ""  , "d" , ""   , "" )
 //#define X(tag, elementty, cvt, sdss, pack, width, fld)
 
 #endif // SUBZERO_SRC_ICEINSTX8664_DEF