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| 1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// | 1 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===// |
| 2 // | 2 // |
| 3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
| 4 // | 4 // |
| 5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
| 6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
| 7 // | 7 // |
| 8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
| 9 /// | 9 /// |
| 10 /// \file | 10 /// \file |
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| 575 _set_dest_nonkillable(); | 575 _set_dest_nonkillable(); |
| 576 Context.insert(InstFakeUse::create(Func, Src)); | 576 Context.insert(InstFakeUse::create(Func, Src)); |
| 577 } | 577 } |
| 578 void _xor(Variable *Dest, Operand *Src0) { | 578 void _xor(Variable *Dest, Operand *Src0) { |
| 579 Context.insert(Traits::Insts::Xor::create(Func, Dest, Src0)); | 579 Context.insert(Traits::Insts::Xor::create(Func, Dest, Src0)); |
| 580 } | 580 } |
| 581 void _xor_rmw(typename Traits::X86OperandMem *DestSrc0, Operand *Src1) { | 581 void _xor_rmw(typename Traits::X86OperandMem *DestSrc0, Operand *Src1) { |
| 582 Context.insert(Traits::Insts::XorRMW::create(Func, DestSrc0, Src1)); | 582 Context.insert(Traits::Insts::XorRMW::create(Func, DestSrc0, Src1)); |
| 583 } | 583 } |
| 584 | 584 |
| 585 void _iaca_start() { Context.insert(Traits::Insts::IacaStart::create(Func)); } |
| 586 void _iaca_end() { Context.insert(Traits::Insts::IacaEnd::create(Func)); } |
| 587 |
| 588 /// This class helps wrap IACA markers around the code generated by the |
| 589 /// current scope. It means you don't need to put an end before each return. |
| 590 class ScopedIacaMark { |
| 591 ScopedIacaMark(const ScopedIacaMark &) = delete; |
| 592 ScopedIacaMark &operator=(const ScopedIacaMark &) = delete; |
| 593 |
| 594 public: |
| 595 ScopedIacaMark(TargetX86Base *Lowering) : Lowering(Lowering) { |
| 596 Lowering->_iaca_start(); |
| 597 } |
| 598 ~ScopedIacaMark() { end(); } |
| 599 void end() { |
| 600 if (!Lowering) |
| 601 return; |
| 602 Lowering->_iaca_end(); |
| 603 Lowering = nullptr; |
| 604 } |
| 605 |
| 606 private: |
| 607 TargetX86Base *Lowering; |
| 608 }; |
| 609 |
| 585 bool optimizeScalarMul(Variable *Dest, Operand *Src0, int32_t Src1); | 610 bool optimizeScalarMul(Variable *Dest, Operand *Src0, int32_t Src1); |
| 586 void findRMW(); | 611 void findRMW(); |
| 587 | 612 |
| 588 typename Traits::InstructionSet InstructionSet = | 613 typename Traits::InstructionSet InstructionSet = |
| 589 Traits::InstructionSet::Begin; | 614 Traits::InstructionSet::Begin; |
| 590 bool IsEbpBasedFrame = false; | 615 bool IsEbpBasedFrame = false; |
| 591 bool NeedsStackAlignment = false; | 616 bool NeedsStackAlignment = false; |
| 592 size_t SpillAreaSizeBytes = 0; | 617 size_t SpillAreaSizeBytes = 0; |
| 593 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; | 618 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; |
| 594 llvm::SmallBitVector ScratchRegs; | 619 llvm::SmallBitVector ScratchRegs; |
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| 627 } | 652 } |
| 628 | 653 |
| 629 BoolFolding FoldingInfo; | 654 BoolFolding FoldingInfo; |
| 630 }; | 655 }; |
| 631 } // end of namespace X86Internal | 656 } // end of namespace X86Internal |
| 632 } // end of namespace Ice | 657 } // end of namespace Ice |
| 633 | 658 |
| 634 #include "IceTargetLoweringX86BaseImpl.h" | 659 #include "IceTargetLoweringX86BaseImpl.h" |
| 635 | 660 |
| 636 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H | 661 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H |
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