Introduce the ability to insert IACA (Intel Architecture Code Analyzer) marks to

src/IceInstX86BaseImpl.h

 //===- subzero/src/IceInstX86BaseImpl.h - Generic X86 instructions -*- C++ -*=//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 349 matching lines @@
 }
 
 template <class Machine>
 InstX86Xchg<Machine>::InstX86Xchg(Cfg *Func, Operand *Dest, Variable *Source)
     : InstX86Base<Machine>(Func, InstX86Base<Machine>::Xchg, 2,
                            llvm::dyn_cast<Variable>(Dest)) {
   this->addSource(Dest);
   this->addSource(Source);
 }
 
+template <class Machine>
+InstX86IacaStart<Machine>::InstX86IacaStart(Cfg *Func)
+    : InstX86Base<Machine>(Func, InstX86Base<Machine>::IacaStart, 0, nullptr) {
+  assert(Func->getContext()->getFlags().getAllowIacaMarks());

[Jim Stichnoth, 2015/08/05 05:08:19]

This is cool (I now learned about IACA), however, without a concrete example,
it's not clear how this is intended to be used long-term.

Based on this assert, my guess is that some lowering code would add iaca_start
and iaca_end if getAllowIacaMarks() is true.

Would it be easier for _iaca_start() and _iaca_end() to conditionally insert the
corresponding instruction based on the flag?  If so, then this assert may be
unnecessary? (though harmless I guess)

We probably also want to make sure none of this code is used in a MINIMAL build.

[ascull, 2015/08/05 18:10:34]

When you run IACA, it analyzes all the marks in the executable. It
reports them as marks 1, 2, 3... which is just the order that they
appear in the executable. This makes it quite difficult to manage the
results if you have a lot of marks in different places. For this reason
I don't think leaving the marks around and activating them with the
flag would be very effective.

Instead I imagine this being used for a before and after comparison or
to help evaluate different strategies by manually inserting the marks
as you are focusing on a particular area. Also, being used with
lowerInst at a position could be useful for seeing if code transforms
have a benefit.

I have found myself asking 'is it better to use sequence of
instructions x, or sequence y?' and this could provide some sort of an
answer.

Speaking with Jan, he imagined using IACA to look for differences
between subzero and LLVM. Unfortunately this would require knowledge of
the kernel you wish to focus on rather than just analyzing the whole
program. This limitation is due to IACA which only works well with a
linear sequence of instructions as it is a static analysis. The
throughput of loops can be analyzed but that requires knowledge of the
loops which is lost in the IR.

I thought about using an LLVM intrinsic to insert the marks externally
but Jan says this might be quite painful to get working, particularly
if it also needs to be added to LLVM in order to make comparisons.

I have a test for minimal in _iaca_*() but have left this assert as a
safety net (as well as the reason in the first <p>).

+}
+
+template <class Machine>
+InstX86IacaEnd<Machine>::InstX86IacaEnd(Cfg *Func)
+    : InstX86Base<Machine>(Func, InstX86Base<Machine>::IacaEnd, 0, nullptr) {
+  assert(Func->getContext()->getFlags().getAllowIacaMarks());
+}
+
 // ======================== Dump routines ======================== //
 
 template <class Machine>
 void InstX86Base<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Str << "[" << Traits::TargetName << "] ";
   Inst::dump(Func);
 }
@@ skipping 2769 matching lines @@
 template <class Machine>
 void InstX86Xchg<Machine>::dump(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
   Ostream &Str = Func->getContext()->getStrDump();
   Type Ty = this->getSrc(0)->getType();
   Str << "xchg." << Ty << " ";
   this->dumpSources(Func);
 }
 
+template <class Machine>
+void InstX86IacaStart<Machine>::emit(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+  Ostream &Str = Func->getContext()->getStrEmit();
+  Str << "\t# IACA_START\n"
+      << "\t.byte 0x0F, 0x0B\n"
+      << "\tmovl\t$111, %ebx\n"
+      << "\t.byte 0x64, 0x67, 0x90";
+}
+
+template <class Machine>
+void InstX86IacaStart<Machine>::emitIAS(const Cfg *Func) const {
+  typename InstX86Base<Machine>::Traits::Assembler *Asm =
+      Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
+  Asm->iaca_start();
+}
+
+template <class Machine>
+void InstX86IacaStart<Machine>::dump(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+  Ostream &Str = Func->getContext()->getStrDump();
+  Str << "IACA_START";
+}
+
+template <class Machine>
+void InstX86IacaEnd<Machine>::emit(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+  Ostream &Str = Func->getContext()->getStrEmit();
+  Str << "\t# IACA_END\n"
+      << "\tmovl\t$222, %ebx\n"
+      << "\t.byte 0x64, 0x67, 0x90\n"
+      << "\t.byte 0x0F, 0x0B";
+}
+
+template <class Machine>
+void InstX86IacaEnd<Machine>::emitIAS(const Cfg *Func) const {
+  typename InstX86Base<Machine>::Traits::Assembler *Asm =
+      Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>();
+  Asm->iaca_end();
+}
+
+template <class Machine>
+void InstX86IacaEnd<Machine>::dump(const Cfg *Func) const {
+  if (!BuildDefs::dump())
+    return;
+  Ostream &Str = Func->getContext()->getStrDump();
+  Str << "IACA_END";
+}
+
 } // end of namespace X86Internal
 
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICEINSTX86BASEIMPL_H