Save a few register moves in function prolog on arm64 by using the same pattern

runtime/vm/assembler_arm64.cc

Index: runtime/vm/assembler_arm64.cc
diff --git a/runtime/vm/assembler_arm64.cc b/runtime/vm/assembler_arm64.cc
index 2422cb4572d61b39245097c4ae2ea05d8249bd76..2597525a9cc583894602012357aacb8bcfefdfc2 100644
--- a/runtime/vm/assembler_arm64.cc
+++ b/runtime/vm/assembler_arm64.cc
@@ -302,12 +302,12 @@ bool Operand::IsImmLogical(uint64_t value, uint8_t width, Operand* imm_op) {
 }
 
 
-void Assembler::LoadPoolPointer() {
+void Assembler::LoadPoolPointer(Register pp) {
   const intptr_t object_pool_pc_dist =
     Instructions::HeaderSize() - Instructions::object_pool_offset() +
     CodeSize();
   // PP <- Read(PC - object_pool_pc_dist).
-  ldr(PP, Address::PC(-object_pool_pc_dist));
+  ldr(pp, Address::PC(-object_pool_pc_dist));
 
   // When in the PP register, the pool pointer is untagged. When we
   // push it on the stack with TagAndPushPP it is tagged again. PopAndUntagPP
@@ -315,8 +315,8 @@ void Assembler::LoadPoolPointer() {
   // object pool only one instruction for the first 4096 entries. Otherwise,
   // because the offset wouldn't be aligned, it would be only one instruction
   // for the first 64 entries.
-  sub(PP, PP, Operand(kHeapObjectTag));
-  set_constant_pool_allowed(true);
+  sub(pp, pp, Operand(kHeapObjectTag));
+  set_constant_pool_allowed(pp == PP);
 }
 
 
@@ -427,6 +427,18 @@ void Assembler::LoadObjectHelper(Register dst,
 }
 
 
+void Assembler::LoadFunctionFromNewPool(Register dst,
+                                        const Function& function,
+                                        Register new_pp) {
+  ASSERT(!constant_pool_allowed());
+  ASSERT(new_pp != PP);
+  const int32_t offset =
+      ObjectPool::element_offset(object_pool_wrapper_.FindObject(function));
+  ASSERT(Address::CanHoldOffset(offset));
+  ldr(dst, Address(new_pp, offset));
+}
+
+
 void Assembler::LoadObject(Register dst, const Object& object) {
   LoadObjectHelper(dst, object, false);
 }