Iasm and obj lowering for advanced switch lowering.

src/IceInstX86Base.h

 //===- subzero/src/IceInstX86Base.h - Generic x86 instructions -*- C++ -*--===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 276 matching lines @@
   SizeT Number; // used for unique label generation.
 };
 
 /// Conditional and unconditional branch instruction.
 template <class Machine> class InstX86Br final : public InstX86Base<Machine> {
   InstX86Br() = delete;
   InstX86Br(const InstX86Br &) = delete;
   InstX86Br &operator=(const InstX86Br &) = delete;
 
 public:
+  enum BrKind { Near, Far };
+
   /// Create a conditional branch to a node.
   static InstX86Br *
   create(Cfg *Func, CfgNode *TargetTrue, CfgNode *TargetFalse,
-         typename InstX86Base<Machine>::Traits::Cond::BrCond Condition) {
+         typename InstX86Base<Machine>::Traits::Cond::BrCond Condition,
+         BrKind Kind) {
     assert(Condition != InstX86Base<Machine>::Traits::Cond::Br_None);
     const InstX86Label<Machine> *NoLabel = nullptr;
     return new (Func->allocate<InstX86Br>())
-        InstX86Br(Func, TargetTrue, TargetFalse, NoLabel, Condition);
+        InstX86Br(Func, TargetTrue, TargetFalse, NoLabel, Condition, Kind);
   }
   /// Create an unconditional branch to a node.
-  static InstX86Br *create(Cfg *Func, CfgNode *Target) {
+  static InstX86Br *create(Cfg *Func, CfgNode *Target, BrKind Kind) {
     const CfgNode *NoCondTarget = nullptr;
     const InstX86Label<Machine> *NoLabel = nullptr;
     return new (Func->allocate<InstX86Br>())
         InstX86Br(Func, NoCondTarget, Target, NoLabel,
-                  InstX86Base<Machine>::Traits::Cond::Br_None);
+                  InstX86Base<Machine>::Traits::Cond::Br_None, Kind);
   }
   /// Create a non-terminator conditional branch to a node, with a
   /// fallthrough to the next instruction in the current node.  This is
   /// used for switch lowering.
   static InstX86Br *
   create(Cfg *Func, CfgNode *Target,
-         typename InstX86Base<Machine>::Traits::Cond::BrCond Condition) {
+         typename InstX86Base<Machine>::Traits::Cond::BrCond Condition,
+         BrKind Kind) {
     assert(Condition != InstX86Base<Machine>::Traits::Cond::Br_None);
     const CfgNode *NoUncondTarget = nullptr;
     const InstX86Label<Machine> *NoLabel = nullptr;
     return new (Func->allocate<InstX86Br>())
-        InstX86Br(Func, Target, NoUncondTarget, NoLabel, Condition);
+        InstX86Br(Func, Target, NoUncondTarget, NoLabel, Condition, Kind);
   }
   /// Create a conditional intra-block branch (or unconditional, if
   /// Condition==Br_None) to a label in the current block.
   static InstX86Br *
   create(Cfg *Func, InstX86Label<Machine> *Label,
-         typename InstX86Base<Machine>::Traits::Cond::BrCond Condition) {
+         typename InstX86Base<Machine>::Traits::Cond::BrCond Condition,
+         BrKind Kind) {
     const CfgNode *NoCondTarget = nullptr;
     const CfgNode *NoUncondTarget = nullptr;
     return new (Func->allocate<InstX86Br>())
-        InstX86Br(Func, NoCondTarget, NoUncondTarget, Label, Condition);
+        InstX86Br(Func, NoCondTarget, NoUncondTarget, Label, Condition, Kind);
   }
   const CfgNode *getTargetTrue() const { return TargetTrue; }
   const CfgNode *getTargetFalse() const { return TargetFalse; }
+  bool isNear() const { return Kind == Near; }
   bool optimizeBranch(const CfgNode *NextNode);
   uint32_t getEmitInstCount() const override {
     uint32_t Sum = 0;
     if (Label)
       ++Sum;
     if (getTargetTrue())
       ++Sum;
     if (getTargetFalse())
       ++Sum;
     return Sum;
   }
   bool isUnconditionalBranch() const override {
     return !Label && Condition == InstX86Base<Machine>::Traits::Cond::Br_None;
   }
   bool repointEdges(CfgNode *OldNode, CfgNode *NewNode) override;
   void emit(const Cfg *Func) const override;
   void emitIAS(const Cfg *Func) const override;
   void dump(const Cfg *Func) const override;
   static bool classof(const Inst *Inst) {
     return InstX86Base<Machine>::isClassof(Inst, InstX86Base<Machine>::Br);
   }
 
 private:
   InstX86Br(Cfg *Func, const CfgNode *TargetTrue, const CfgNode *TargetFalse,
             const InstX86Label<Machine> *Label,
-            typename InstX86Base<Machine>::Traits::Cond::BrCond Condition);
+            typename InstX86Base<Machine>::Traits::Cond::BrCond Condition,
+            BrKind Kind);
 
   typename InstX86Base<Machine>::Traits::Cond::BrCond Condition;
   const CfgNode *TargetTrue;
   const CfgNode *TargetFalse;
   const InstX86Label<Machine> *Label; // Intra-block branch target
+  const BrKind Kind;

[Jim Stichnoth, 2015/07/30 15:20:23]

Consider changing the field name to something more specific, like "Mode"?

Because my first assumption on what "kind" means with respect to a branch
instruction would probably be more like "conditional vs unconditional".

[ascull, 2015/07/30 17:29:59]

Done.

 };
 
 /// Jump to a target outside this function, such as tailcall, nacljump,
 /// naclret, unreachable.  This is different from a Branch instruction
 /// in that there is no intra-function control flow to represent.
 template <class Machine> class InstX86Jmp final : public InstX86Base<Machine> {
   InstX86Jmp() = delete;
   InstX86Jmp(const InstX86Jmp &) = delete;
   InstX86Jmp &operator=(const InstX86Jmp &) = delete;
 
@@ skipping 2760 matching lines @@
           &InstX86Base<Machine>::Traits::Assembler::psrl};                     \
   }                                                                            \
   }
 
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #include "IceInstX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICEINSTX86BASE_H