Iasm and obj lowering for advanced switch lowering.

src/IceAssemblerX86Base.h

 //===- subzero/src/IceAssemblerX86Base.h - base x86 assembler -*- C++ -*---===//
 //
 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 //
 // Modified by the Subzero authors.
 //
 //===----------------------------------------------------------------------===//
 //
@@ skipping 53 matching lines @@
   }
   bool is_uint16() const {
     return fixup_ == nullptr && Utils::IsUint(16, value_);
   }
 
 private:
   const int32_t value_;
   AssemblerFixup *fixup_ = nullptr;
 };
 
-class Label {
+/// X86 allows near and far jumps.
+class Label final : public Ice::Label {
   Label(const Label &) = delete;
   Label &operator=(const Label &) = delete;
 
 public:
-  Label() {
-    if (BuildDefs::asserts()) {
-      for (int i = 0; i < kMaxUnresolvedBranches; i++) {
-        unresolved_near_positions_[i] = -1;
-      }
-    }
+  Label() = default;
+  ~Label() = default;
+
+  void finalCheck() const override {
+    Ice::Label::finalCheck();
+    assert(!hasNear());
   }
 
-  ~Label() = default;
-
-  void FinalCheck() const {
-    // Assert if label is being destroyed with unresolved branches pending.
-    assert(!IsLinked());
-    assert(!HasNear());
+  /// Returns the position of an earlier branch instruction which assumes that
+  /// this label is "near", and bumps iterator to the next near position.
+  intptr_t getNearPosition() {
+    assert(hasNear());
+    intptr_t Pos = UnresolvedNearPositions.back();
+    UnresolvedNearPositions.pop_back();
+    return Pos;
   }
 
-  // TODO(jvoung): why are labels offset by this?
-  static const uint32_t kWordSize = sizeof(uint32_t);
-
-  // Returns the position for bound labels (branches that come after this
-  // are considered backward branches). Cannot be used for unused or linked
-  // labels.
-  intptr_t Position() const {
-    assert(IsBound());
-    return -position_ - kWordSize;
+  bool hasNear() const { return !UnresolvedNearPositions.empty(); }
+  bool isUnused() const override {
+    return Ice::Label::isUnused() && !hasNear();
   }
 
-  // Returns the position of an earlier branch instruction that was linked
-  // to this label (branches that use this are considered forward branches).
-  // The linked instructions form a linked list, of sorts, using the
-  // instruction's displacement field for the location of the next
-  // instruction that is also linked to this label.
-  intptr_t LinkPosition() const {
-    assert(IsLinked());
-    return position_ - kWordSize;
+private:
+  void nearLinkTo(intptr_t position) {
+    assert(!isBound());
+    UnresolvedNearPositions.push_back(position);
   }
 
-  // Returns the position of an earlier branch instruction which
-  // assumes that this label is "near", and bumps iterator to the
-  // next near position.
-  intptr_t NearPosition() {
-    assert(HasNear());
-    return unresolved_near_positions_[--num_unresolved_];
-  }
-
-  bool IsBound() const { return position_ < 0; }
-  bool IsLinked() const { return position_ > 0; }
-  bool IsUnused() const { return (position_ == 0) && (num_unresolved_ == 0); }
-  bool HasNear() const { return num_unresolved_ != 0; }
-
-private:
-  void BindTo(intptr_t position) {
-    assert(!IsBound());
-    assert(!HasNear());
-    position_ = -position - kWordSize;
-    assert(IsBound());
-  }
-
-  void LinkTo(intptr_t position) {
-    assert(!IsBound());
-    position_ = position + kWordSize;
-    assert(IsLinked());
-  }
-
-  void NearLinkTo(intptr_t position) {
-    assert(!IsBound());
-    assert(num_unresolved_ < kMaxUnresolvedBranches);
-    unresolved_near_positions_[num_unresolved_++] = position;
-  }
-
-  static constexpr int kMaxUnresolvedBranches = 20;
-
-  intptr_t position_ = 0;
-  intptr_t num_unresolved_ = 0;
-  // TODO(stichnot,jvoung): Can this instead be
-  // llvm::SmallVector<intptr_t, kMaxUnresolvedBranches> ?
-  intptr_t unresolved_near_positions_[kMaxUnresolvedBranches];
+  llvm::SmallVector<intptr_t, 20> UnresolvedNearPositions;
 
   template <class> friend class AssemblerX86Base;
 };
 
 template <class Machine> class AssemblerX86Base : public Assembler {
   AssemblerX86Base(const AssemblerX86Base &) = delete;
   AssemblerX86Base &operator=(const AssemblerX86Base &) = delete;
 
 protected:
   AssemblerX86Base(AssemblerKind Kind, bool use_far_branches)
       : Assembler(Kind) {
     // This mode is only needed and implemented for MIPS and ARM.
     assert(!use_far_branches);
     (void)use_far_branches;
   }
 
 public:
   using Traits = MachineTraits<Machine>;
 
   ~AssemblerX86Base() override;
 
   static const bool kNearJump = true;
   static const bool kFarJump = false;
 
   void alignFunction() override;
 
   SizeT getBundleAlignLog2Bytes() const override { return 5; }
 
-  const char *getNonExecPadDirective() const override { return ".p2align"; }
+  const char *getAlignDirective() const override { return ".p2align"; }
 
   llvm::ArrayRef<uint8_t> getNonExecBundlePadding() const override {
     static const uint8_t Padding[] = {0xF4};
     return llvm::ArrayRef<uint8_t>(Padding, 1);
   }
 
   void padWithNop(intptr_t Padding) override {
     while (Padding > MAX_NOP_SIZE) {
       nop(MAX_NOP_SIZE);
       Padding -= MAX_NOP_SIZE;
     }
     if (Padding)
       nop(Padding);
   }
 
-  Label *GetOrCreateCfgNodeLabel(SizeT NodeNumber);
+  Label *getOrCreateCfgNodeLabel(SizeT NodeNumber) override;
   void bindCfgNodeLabel(SizeT NodeNumber) override;
-  Label *GetOrCreateLocalLabel(SizeT Number);
+  Label *getOrCreateLocalLabel(SizeT Number);
   void BindLocalLabel(SizeT Number);

[Jim Stichnoth, 2015/07/30 15:20:23]

Change this to lowercase as well?

[ascull, 2015/07/30 17:29:59]

Done.

 
   bool fixupIsPCRel(FixupKind Kind) const override {
     // Currently assuming this is the only PC-rel relocation type used.
     // TODO(jpp): Traits.PcRelTypes.count(Kind) != 0
     return Kind == Traits::PcRelFixup;
   }
 
   // Operations to emit GPR instructions (and dispatch on operand type).
   typedef void (AssemblerX86Base::*TypedEmitGPR)(Type,
                                                  typename Traits::GPRRegister);
@@ skipping 665 matching lines @@
   void emitGenericShift(int rm, Type Ty,
                         const typename Traits::Operand &operand,
                         typename Traits::GPRRegister shifter);
 
   typedef std::vector<Label *> LabelVector;
   // A vector of pool-allocated x86 labels for CFG nodes.
   LabelVector CfgNodeLabels;
   // A vector of pool-allocated x86 labels for Local labels.
   LabelVector LocalLabels;
 
-  Label *GetOrCreateLabel(SizeT Number, LabelVector &Labels);
+  Label *getOrCreateLabel(SizeT Number, LabelVector &Labels);
 
   // The arith_int() methods factor out the commonality between the encodings of
   // add(), Or(), adc(), sbb(), And(), sub(), Xor(), and cmp().  The Tag
   // parameter is statically asserted to be less than 8.
   template <uint32_t Tag>
   void arith_int(Type Ty, typename Traits::GPRRegister reg,
                  const Immediate &imm);
 
   template <uint32_t Tag>
   void arith_int(Type Ty, typename Traits::GPRRegister reg0,
@@ skipping 49 matching lines @@
   emitUint8(0x66);
 }
 
 } // end of namespace X86Internal
 
 } // end of namespace Ice
 
 #include "IceAssemblerX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICEASSEMBLERX86BASE_H