Iasm and obj lowering for advanced switch lowering.

src/IceTargetLoweringX86Base.h

 //===- subzero/src/IceTargetLoweringX86Base.h - x86 lowering ----*- C++ -*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 142 matching lines @@
   /// Naive lowering of cmpxchg.
   void lowerAtomicCmpxchg(Variable *DestPrev, Operand *Ptr, Operand *Expected,
                           Operand *Desired);
   /// Attempt a more optimized lowering of cmpxchg. Returns true if optimized.
   bool tryOptimizedCmpxchgCmpBr(Variable *DestPrev, Operand *Ptr,
                                 Operand *Expected, Operand *Desired);
   void lowerAtomicRMW(Variable *Dest, uint32_t Operation, Operand *Ptr,
                       Operand *Val);
   void lowerCountZeros(bool Cttz, Type Ty, Variable *Dest, Operand *FirstVal,
                        Operand *SecondVal);
+  /// Lower and indirect jump adding sandboxing when needed.

[jvoung (off chromium), 2015/07/29 21:31:17]

"Lower an indirect" ?

[ascull, 2015/07/29 22:43:04]

Done.

+  void lowerIndirectJump(Variable *Target);
 
   /// Check the comparison is in [Min,Max]. The flags register will be modified
   /// with:
   ///   - below equal, if in range
   ///   - above, set if not in range
   /// The index into the range is returned.
   Operand *lowerCmpRange(Operand *Comparison, uint64_t Min, uint64_t Max);
   /// Lowering of a cluster of switch cases. If the case is not matched control
   /// will pass to the default label provided. If the default label is nullptr
   /// then control will fall through to the next instruction. DoneCmp should be
@@ skipping 88 matching lines @@
     Context.insert(Traits::Insts::And::create(Func, Dest, Src0));
   }
   void _and_rmw(typename Traits::X86OperandMem *DestSrc0, Operand *Src1) {
     Context.insert(Traits::Insts::AndRMW::create(Func, DestSrc0, Src1));
   }
   void _blendvps(Variable *Dest, Operand *Src0, Operand *Src1) {
     Context.insert(Traits::Insts::Blendvps::create(Func, Dest, Src0, Src1));
   }
   void _br(typename Traits::Cond::BrCond Condition, CfgNode *TargetTrue,
            CfgNode *TargetFalse) {
-    Context.insert(
-        Traits::Insts::Br::create(Func, TargetTrue, TargetFalse, Condition));
+    Context.insert(Traits::Insts::Br::create(
+        Func, TargetTrue, TargetFalse, Condition, Traits::Insts::Br::Far));
   }
   void _br(CfgNode *Target) {
-    Context.insert(Traits::Insts::Br::create(Func, Target));
+    Context.insert(
+        Traits::Insts::Br::create(Func, Target, Traits::Insts::Br::Far));
   }
   void _br(typename Traits::Cond::BrCond Condition, CfgNode *Target) {
-    Context.insert(Traits::Insts::Br::create(Func, Target, Condition));
+    Context.insert(Traits::Insts::Br::create(Func, Target, Condition,
+                                             Traits::Insts::Br::Far));
   }
   void _br(typename Traits::Cond::BrCond Condition,
-           typename Traits::Insts::Label *Label) {
-    Context.insert(Traits::Insts::Br::create(Func, Label, Condition));
+           typename Traits::Insts::Label *Label,
+           typename Traits::Insts::Br::BrKind Kind = Traits::Insts::Br::Near) {
+    Context.insert(Traits::Insts::Br::create(Func, Label, Condition, Kind));
   }
   void _bsf(Variable *Dest, Operand *Src0) {
     Context.insert(Traits::Insts::Bsf::create(Func, Dest, Src0));
   }
   void _bsr(Variable *Dest, Operand *Src0) {
     Context.insert(Traits::Insts::Bsr::create(Func, Dest, Src0));
   }
   void _bswap(Variable *SrcDest) {
     Context.insert(Traits::Insts::Bswap::create(Func, SrcDest));
   }
@@ skipping 312 matching lines @@
   }
 
   BoolFolding FoldingInfo;
 };
 } // end of namespace X86Internal
 } // end of namespace Ice
 
 #include "IceTargetLoweringX86BaseImpl.h"
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGX86BASE_H