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Unified Diff: src/mips64/macro-assembler-mips64.h

Issue 1255883002: VectorICs: vector [keyed]store ic MISS handling infrastructure. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Fix nit. Created 5 years, 5 months ago
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Index: src/mips64/macro-assembler-mips64.h
diff --git a/src/mips64/macro-assembler-mips64.h b/src/mips64/macro-assembler-mips64.h
index 7be1642ac320875a134580f23f75cc79a6785902..806a5475a924e95a6489712aa88f23e328efbfa5 100644
--- a/src/mips64/macro-assembler-mips64.h
+++ b/src/mips64/macro-assembler-mips64.h
@@ -699,6 +699,17 @@ class MacroAssembler: public Assembler {
sd(src4, MemOperand(sp, 0 * kPointerSize));
}
+ // Push five registers. Pushes leftmost register first (to highest address).
+ void Push(Register src1, Register src2, Register src3, Register src4,
+ Register src5) {
+ Dsubu(sp, sp, Operand(5 * kPointerSize));
+ sd(src1, MemOperand(sp, 4 * kPointerSize));
+ sd(src2, MemOperand(sp, 3 * kPointerSize));
+ sd(src3, MemOperand(sp, 2 * kPointerSize));
+ sd(src4, MemOperand(sp, 1 * kPointerSize));
+ sd(src5, MemOperand(sp, 0 * kPointerSize));
+ }
+
void Push(Register src, Condition cond, Register tst1, Register tst2) {
// Since we don't have conditional execution we use a Branch.
Branch(3, cond, tst1, Operand(tst2));
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