OLD | NEW |
1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ | 5 #ifndef V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ |
6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ | 6 #define V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ |
7 | 7 |
8 #include "src/assembler.h" | 8 #include "src/assembler.h" |
9 #include "src/globals.h" | 9 #include "src/globals.h" |
10 #include "src/mips/assembler-mips.h" | 10 #include "src/mips/assembler-mips.h" |
(...skipping 656 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
667 | 667 |
668 // Push four registers. Pushes leftmost register first (to highest address). | 668 // Push four registers. Pushes leftmost register first (to highest address). |
669 void Push(Register src1, Register src2, Register src3, Register src4) { | 669 void Push(Register src1, Register src2, Register src3, Register src4) { |
670 Subu(sp, sp, Operand(4 * kPointerSize)); | 670 Subu(sp, sp, Operand(4 * kPointerSize)); |
671 sw(src1, MemOperand(sp, 3 * kPointerSize)); | 671 sw(src1, MemOperand(sp, 3 * kPointerSize)); |
672 sw(src2, MemOperand(sp, 2 * kPointerSize)); | 672 sw(src2, MemOperand(sp, 2 * kPointerSize)); |
673 sw(src3, MemOperand(sp, 1 * kPointerSize)); | 673 sw(src3, MemOperand(sp, 1 * kPointerSize)); |
674 sw(src4, MemOperand(sp, 0 * kPointerSize)); | 674 sw(src4, MemOperand(sp, 0 * kPointerSize)); |
675 } | 675 } |
676 | 676 |
| 677 // Push five registers. Pushes leftmost register first (to highest address). |
| 678 void Push(Register src1, Register src2, Register src3, Register src4, |
| 679 Register src5) { |
| 680 Subu(sp, sp, Operand(5 * kPointerSize)); |
| 681 sw(src1, MemOperand(sp, 4 * kPointerSize)); |
| 682 sw(src2, MemOperand(sp, 3 * kPointerSize)); |
| 683 sw(src3, MemOperand(sp, 2 * kPointerSize)); |
| 684 sw(src4, MemOperand(sp, 1 * kPointerSize)); |
| 685 sw(src5, MemOperand(sp, 0 * kPointerSize)); |
| 686 } |
| 687 |
677 void Push(Register src, Condition cond, Register tst1, Register tst2) { | 688 void Push(Register src, Condition cond, Register tst1, Register tst2) { |
678 // Since we don't have conditional execution we use a Branch. | 689 // Since we don't have conditional execution we use a Branch. |
679 Branch(3, cond, tst1, Operand(tst2)); | 690 Branch(3, cond, tst1, Operand(tst2)); |
680 Subu(sp, sp, Operand(kPointerSize)); | 691 Subu(sp, sp, Operand(kPointerSize)); |
681 sw(src, MemOperand(sp, 0)); | 692 sw(src, MemOperand(sp, 0)); |
682 } | 693 } |
683 | 694 |
684 // Pops multiple values from the stack and load them in the | 695 // Pops multiple values from the stack and load them in the |
685 // registers specified in regs. Pop order is the opposite as in MultiPush. | 696 // registers specified in regs. Pop order is the opposite as in MultiPush. |
686 void MultiPop(RegList regs); | 697 void MultiPop(RegList regs); |
(...skipping 1045 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1732 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) | 1743 #define CODE_COVERAGE_TOSTRING(x) CODE_COVERAGE_STRINGIFY(x) |
1733 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) | 1744 #define __FILE_LINE__ __FILE__ ":" CODE_COVERAGE_TOSTRING(__LINE__) |
1734 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> | 1745 #define ACCESS_MASM(masm) masm->stop(__FILE_LINE__); masm-> |
1735 #else | 1746 #else |
1736 #define ACCESS_MASM(masm) masm-> | 1747 #define ACCESS_MASM(masm) masm-> |
1737 #endif | 1748 #endif |
1738 | 1749 |
1739 } } // namespace v8::internal | 1750 } } // namespace v8::internal |
1740 | 1751 |
1741 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ | 1752 #endif // V8_MIPS_MACRO_ASSEMBLER_MIPS_H_ |
OLD | NEW |