On x64 use 32bit idiv when possible instead of 64bit one.

runtime/vm/intermediate_language_x64.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_X64.
 #if defined(TARGET_ARCH_X64)
 
 #include "vm/intermediate_language.h"
 
 #include "lib/error.h"
@@ skipping 1118 matching lines @@
     case kTypedDataInt16ArrayCid:
       __ movsxw(result, element_address);
       __ SmiTag(result);
       break;
     case kTypedDataUint16ArrayCid:
     case kTwoByteStringCid:
       __ movzxw(result, element_address);
       __ SmiTag(result);
       break;
     case kTypedDataInt32ArrayCid:
-      __ movsxl(result, element_address);
+      __ movsxd(result, element_address);
       __ SmiTag(result);
       break;
     case kTypedDataUint32ArrayCid:
       __ movl(result, element_address);
       __ SmiTag(result);
       break;
     default:
       ASSERT((class_id() == kArrayCid) || (class_id() == kImmutableArrayCid));
       __ movq(result, element_address);
       break;
@@ skipping 1171 matching lines @@
       // No overflow check.
       __ orq(left, right);
       break;
     }
     case Token::kBIT_XOR: {
       // No overflow check.
       __ xorq(left, right);
       break;
     }
     case Token::kTRUNCDIV: {
+      Label not_32bit, done;
+
+      Register temp = locs()->temp(0).reg();
+      ASSERT(left == RAX);
+      ASSERT((right != RDX) && (right != RAX));
+      ASSERT(temp == RDX);
+      ASSERT(result == RAX);
+
       // Handle divide by zero in runtime.
       __ testq(right, right);
       __ j(ZERO, deopt);
-      ASSERT(left == RAX);
-      ASSERT((right != RDX) && (right != RAX));
-      ASSERT(locs()->temp(0).reg() == RDX);
-      ASSERT(result == RAX);
+
+      // Check if both operands fit into 32bits as idiv with 64bit operands
+      // requires twice as many cycles and has much higher latency.
+      // We are checking this before untagging them to avoid corner case
+      // dividing INT_MAX by -1 that raises exception because quotient is
+      // too large for 32bit register.
+      __ movsxd(temp, left);
+      __ cmpq(temp, left);
+      __ j(NOT_EQUAL, &not_32bit);
+      __ movsxd(temp, right);
+      __ cmpq(temp, right);
+      __ j(NOT_EQUAL, &not_32bit);
+
+      // Both operands are 31bit smis. Divide using 32bit idiv.
+      __ SmiUntag(left);
+      __ SmiUntag(right);
+      __ cdq();
+      __ idivl(right);
+      __ movsxd(result, result);
+      __ jmp(&done);
+
+      // Divide using 64bit idiv.
+      __ Bind(&not_32bit);
       __ SmiUntag(left);
       __ SmiUntag(right);
       __ cqo();  // Sign extend RAX -> RDX:RAX.
       __ idivq(right);  //  RAX: quotient, RDX: remainder.
       // Check the corner case of dividing the 'MIN_SMI' with -1, in which
       // case we cannot tag the result.
       __ cmpq(result, Immediate(0x4000000000000000));
       __ j(EQUAL, deopt);
+      __ Bind(&done);
       __ SmiTag(result);
       break;
     }
     case Token::kSHR: {
       if (CanDeoptimize()) {
         __ cmpq(right, Immediate(0));
         __ j(LESS, deopt);
       }
       __ SmiUntag(right);
       // sarq operation masks the count to 6 bits.
@@ skipping 973 matching lines @@
                          PcDescriptors::kOther,
                          locs());
   __ Drop(2);  // Discard type arguments and receiver.
 }
 
 }  // namespace dart
 
 #undef __
 
 #endif  // defined TARGET_ARCH_X64