| OLD | NEW |
| 1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2012, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/disassembler.h" | 5 #include "vm/disassembler.h" |
| 6 | 6 |
| 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32. | 7 #include "vm/globals.h" // Needed here to get TARGET_ARCH_IA32. |
| 8 #if defined(TARGET_ARCH_X64) | 8 #if defined(TARGET_ARCH_X64) |
| 9 #include "platform/utils.h" | 9 #include "platform/utils.h" |
| 10 #include "vm/allocation.h" | 10 #include "vm/allocation.h" |
| (...skipping 52 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 63 { 0x2A, BYTE_REG_OPER_OP_ORDER, "sub" }, | 63 { 0x2A, BYTE_REG_OPER_OP_ORDER, "sub" }, |
| 64 { 0x2B, REG_OPER_OP_ORDER, "sub" }, | 64 { 0x2B, REG_OPER_OP_ORDER, "sub" }, |
| 65 { 0x30, BYTE_OPER_REG_OP_ORDER, "xor" }, | 65 { 0x30, BYTE_OPER_REG_OP_ORDER, "xor" }, |
| 66 { 0x31, OPER_REG_OP_ORDER, "xor" }, | 66 { 0x31, OPER_REG_OP_ORDER, "xor" }, |
| 67 { 0x32, BYTE_REG_OPER_OP_ORDER, "xor" }, | 67 { 0x32, BYTE_REG_OPER_OP_ORDER, "xor" }, |
| 68 { 0x33, REG_OPER_OP_ORDER, "xor" }, | 68 { 0x33, REG_OPER_OP_ORDER, "xor" }, |
| 69 { 0x38, BYTE_OPER_REG_OP_ORDER, "cmp" }, | 69 { 0x38, BYTE_OPER_REG_OP_ORDER, "cmp" }, |
| 70 { 0x39, OPER_REG_OP_ORDER, "cmp" }, | 70 { 0x39, OPER_REG_OP_ORDER, "cmp" }, |
| 71 { 0x3A, BYTE_REG_OPER_OP_ORDER, "cmp" }, | 71 { 0x3A, BYTE_REG_OPER_OP_ORDER, "cmp" }, |
| 72 { 0x3B, REG_OPER_OP_ORDER, "cmp" }, | 72 { 0x3B, REG_OPER_OP_ORDER, "cmp" }, |
| 73 { 0x63, REG_OPER_OP_ORDER, "movsxlq" }, | 73 { 0x63, REG_OPER_OP_ORDER, "movsxd" }, |
| 74 { 0x84, BYTE_REG_OPER_OP_ORDER, "test" }, | 74 { 0x84, BYTE_REG_OPER_OP_ORDER, "test" }, |
| 75 { 0x85, REG_OPER_OP_ORDER, "test" }, | 75 { 0x85, REG_OPER_OP_ORDER, "test" }, |
| 76 { 0x86, BYTE_REG_OPER_OP_ORDER, "xchg" }, | 76 { 0x86, BYTE_REG_OPER_OP_ORDER, "xchg" }, |
| 77 { 0x87, REG_OPER_OP_ORDER, "xchg" }, | 77 { 0x87, REG_OPER_OP_ORDER, "xchg" }, |
| 78 { 0x88, BYTE_OPER_REG_OP_ORDER, "mov" }, | 78 { 0x88, BYTE_OPER_REG_OP_ORDER, "mov" }, |
| 79 { 0x89, OPER_REG_OP_ORDER, "mov" }, | 79 { 0x89, OPER_REG_OP_ORDER, "mov" }, |
| 80 { 0x8A, BYTE_REG_OPER_OP_ORDER, "mov" }, | 80 { 0x8A, BYTE_REG_OPER_OP_ORDER, "mov" }, |
| 81 { 0x8B, REG_OPER_OP_ORDER, "mov" }, | 81 { 0x8B, REG_OPER_OP_ORDER, "mov" }, |
| 82 { 0x8D, REG_OPER_OP_ORDER, "lea" }, | 82 { 0x8D, REG_OPER_OP_ORDER, "lea" }, |
| 83 { -1, UNSET_OP_ORDER, "" } | 83 { -1, UNSET_OP_ORDER, "" } |
| (...skipping 1834 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 1918 pc); | 1918 pc); |
| 1919 pc += instruction_length; | 1919 pc += instruction_length; |
| 1920 } | 1920 } |
| 1921 | 1921 |
| 1922 return; | 1922 return; |
| 1923 } | 1923 } |
| 1924 | 1924 |
| 1925 } // namespace dart | 1925 } // namespace dart |
| 1926 | 1926 |
| 1927 #endif // defined TARGET_ARCH_X64 | 1927 #endif // defined TARGET_ARCH_X64 |
| OLD | NEW |