| Index: src/IceTargetLoweringMIPS32.cpp
|
| diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp
|
| index add97b36dd8abcae2d278ed6e015442ee380b2d1..99c992827475a222248838f4f07d062e42dd367f 100644
|
| --- a/src/IceTargetLoweringMIPS32.cpp
|
| +++ b/src/IceTargetLoweringMIPS32.cpp
|
| @@ -648,15 +648,6 @@ void TargetMIPS32::prelowerPhis() {
|
| UnimplementedError(Func->getContext()->getFlags());
|
| }
|
|
|
| -// Lower the pre-ordered list of assignments into mov instructions.
|
| -// Also has to do some ad-hoc register allocation as necessary.
|
| -void TargetMIPS32::lowerPhiAssignments(CfgNode *Node,
|
| - const AssignList &Assignments) {
|
| - (void)Node;
|
| - (void)Assignments;
|
| - UnimplementedError(Func->getContext()->getFlags());
|
| -}
|
| -
|
| void TargetMIPS32::postLower() {
|
| if (Ctx->getFlags().getOptLevel() == Opt_m1)
|
| return;
|
|
|