Subzero: Cleanly implement register allocation after phi lowering.

src/IceTargetLoweringARM32.cpp

Index: src/IceTargetLoweringARM32.cpp
diff --git a/src/IceTargetLoweringARM32.cpp b/src/IceTargetLoweringARM32.cpp
index faf1aa03d2b2c149f54aa42bb3761b06e87ef611..fee088032d13ff9aa778b87a2b2dc39500d64d80 100644
--- a/src/IceTargetLoweringARM32.cpp
+++ b/src/IceTargetLoweringARM32.cpp
@@ -1472,14 +1472,11 @@ void TargetARM32::lowerAssign(const InstAssign *Inst) {
   } else {
     Operand *SrcR;
     if (Dest->hasReg()) {
-      // If Dest already has a physical register, then legalize the
-      // Src operand into a Variable with the same register
-      // assignment.  This is mostly a workaround for advanced phi
-      // lowering's ad-hoc register allocation which assumes no
-      // register allocation is needed when at least one of the
-      // operands is non-memory.
+      // If Dest already has a physical register, then legalize the Src operand
+      // into a Variable with the same register assignment.  This especially
+      // helps allow the use of Flex operands.
       // TODO(jvoung): check this for ARM.

[jvoung (off chromium), 2015/07/24 19:43:08]

can we remove the TODO now?

I think it was about "This is mostly a workaround for advanced phi lowering's
ad-hoc register allocation which assumes no register allocation is needed when
at least one of the operands is non-memory."

Also, might be able to rename SrcR to something else since it's Legal_Reg |
Legal_Flex here?

[Jim Stichnoth, 2015/07/26 04:47:50]

OK, done.  I wasn't sure whether the todo referred to that.
OK, I went with the generic "NewSrc" rather than SrcR or SrcRF.

-      SrcR = legalize(Src0, Legal_Reg, Dest->getRegNum());
+      SrcR = legalize(Src0, Legal_Reg | Legal_Flex, Dest->getRegNum());
     } else {
       // Dest could be a stack operand. Since we could potentially need
       // to do a Store (and store can only have Register operands),
@@ -2415,15 +2412,6 @@ void TargetARM32::prelowerPhis() {
   PhiLowering::prelowerPhis32Bit<TargetARM32>(this, Context.getNode(), Func);
 }
 
-// Lower the pre-ordered list of assignments into mov instructions.
-// Also has to do some ad-hoc register allocation as necessary.
-void TargetARM32::lowerPhiAssignments(CfgNode *Node,
-                                      const AssignList &Assignments) {
-  (void)Node;
-  (void)Assignments;
-  UnimplementedError(Func->getContext()->getFlags());
-}
-
 Variable *TargetARM32::makeVectorOfZeros(Type Ty, int32_t RegNum) {
   Variable *Reg = makeReg(Ty, RegNum);
   UnimplementedError(Func->getContext()->getFlags());