Decode ic data and arguments descriptor passed in calls on ARM.

runtime/vm/instructions_arm_test.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"
 #if defined(TARGET_ARCH_ARM)
 
 #include "vm/assembler.h"
 #include "vm/instructions.h"
 #include "vm/stub_code.h"
 #include "vm/unit_test.h"
 
 namespace dart {
 
 #define __ assembler->
 
 ASSEMBLER_TEST_GENERATE(Call, assembler) {
   __ BranchLinkPatchable(&StubCode::InstanceFunctionLookupLabel());
-  // Do not emit any code after the call above, since we decode backwards
-  // starting from the return address, i.e. from the end of this code buffer.
+  __ Ret();
 }
 
 
 ASSEMBLER_TEST_RUN(Call, test) {
-  CallPattern call(test->entry() + test->code().Size(), test->code());
+  // The return address, which must be the address of an instruction contained
+  // in the code, points to the Ret instruction above, i.e. one instruction
+  // before the end of the code buffer.

[zra, 2013/03/11 22:36:08]

Check why this did not fail before.

[regis, 2013/03/11 23:16:30]

code_patcher_arm verifies the above statement with an assert, but not
instructions_arm. I have now added the assert.

+  CallPattern call(test->entry() + test->code().Size() - Instr::kInstrSize,
+                   test->code());
   EXPECT_EQ(StubCode::InstanceFunctionLookupLabel().address(),
             call.TargetAddress());
 }
 
 
 ASSEMBLER_TEST_GENERATE(Jump, assembler) {
   __ BranchPatchable(&StubCode::InstanceFunctionLookupLabel());
   __ BranchPatchable(&StubCode::AllocateArrayLabel());
 }
 
@@ skipping 11 matching lines @@
   jump2.SetTargetAddress(target1);
   EXPECT_EQ(StubCode::AllocateArrayLabel().address(),
             jump1.TargetAddress());
   EXPECT_EQ(StubCode::InstanceFunctionLookupLabel().address(),
             jump2.TargetAddress());
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM