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| 1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
| 2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
| 3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
| 4 // met: | 4 // met: |
| 5 // | 5 // |
| 6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
| 7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
| 8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
| 9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
| 10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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| 1819 int false_block = chunk_->LookupDestination(instr->false_block_id()); | 1819 int false_block = chunk_->LookupDestination(instr->false_block_id()); |
| 1820 | 1820 |
| 1821 Representation r = instr->hydrogen()->value()->representation(); | 1821 Representation r = instr->hydrogen()->value()->representation(); |
| 1822 if (r.IsInteger32()) { | 1822 if (r.IsInteger32()) { |
| 1823 Register reg = ToRegister(instr->value()); | 1823 Register reg = ToRegister(instr->value()); |
| 1824 EmitBranch(true_block, false_block, ne, reg, Operand(zero_reg)); | 1824 EmitBranch(true_block, false_block, ne, reg, Operand(zero_reg)); |
| 1825 } else if (r.IsDouble()) { | 1825 } else if (r.IsDouble()) { |
| 1826 CpuFeatureScope scope(masm(), FPU); | 1826 CpuFeatureScope scope(masm(), FPU); |
| 1827 DoubleRegister reg = ToDoubleRegister(instr->value()); | 1827 DoubleRegister reg = ToDoubleRegister(instr->value()); |
| 1828 // Test the double value. Zero and NaN are false. | 1828 // Test the double value. Zero and NaN are false. |
| 1829 EmitBranchF(true_block, false_block, ne, reg, kDoubleRegZero); | 1829 EmitBranchF(true_block, false_block, nue, reg, kDoubleRegZero); |
| 1830 } else { | 1830 } else { |
| 1831 ASSERT(r.IsTagged()); | 1831 ASSERT(r.IsTagged()); |
| 1832 Register reg = ToRegister(instr->value()); | 1832 Register reg = ToRegister(instr->value()); |
| 1833 HType type = instr->hydrogen()->value()->type(); | 1833 HType type = instr->hydrogen()->value()->type(); |
| 1834 if (type.IsBoolean()) { | 1834 if (type.IsBoolean()) { |
| 1835 __ LoadRoot(at, Heap::kTrueValueRootIndex); | 1835 __ LoadRoot(at, Heap::kTrueValueRootIndex); |
| 1836 EmitBranch(true_block, false_block, eq, reg, Operand(at)); | 1836 EmitBranch(true_block, false_block, eq, reg, Operand(at)); |
| 1837 } else if (type.IsSmi()) { | 1837 } else if (type.IsSmi()) { |
| 1838 EmitBranch(true_block, false_block, ne, reg, Operand(zero_reg)); | 1838 EmitBranch(true_block, false_block, ne, reg, Operand(zero_reg)); |
| 1839 } else { | 1839 } else { |
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| 6064 __ Subu(scratch, result, scratch); | 6064 __ Subu(scratch, result, scratch); |
| 6065 __ lw(result, FieldMemOperand(scratch, | 6065 __ lw(result, FieldMemOperand(scratch, |
| 6066 FixedArray::kHeaderSize - kPointerSize)); | 6066 FixedArray::kHeaderSize - kPointerSize)); |
| 6067 __ bind(&done); | 6067 __ bind(&done); |
| 6068 } | 6068 } |
| 6069 | 6069 |
| 6070 | 6070 |
| 6071 #undef __ | 6071 #undef __ |
| 6072 | 6072 |
| 6073 } } // namespace v8::internal | 6073 } } // namespace v8::internal |
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