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Side by Side Diff: src/ic/mips64/ic-mips64.cc

Issue 1248303002: Unify runtime-style IC functions with Runtime intrinsics (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Make mips work Created 5 years, 5 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 5
6 #include "src/v8.h" 6 #include "src/v8.h"
7 7
8 #if V8_TARGET_ARCH_MIPS64 8 #if V8_TARGET_ARCH_MIPS64
9 9
10 #include "src/codegen.h" 10 #include "src/codegen.h"
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310 // The return address is on the stack. 310 // The return address is on the stack.
311 Isolate* isolate = masm->isolate(); 311 Isolate* isolate = masm->isolate();
312 312
313 DCHECK(!AreAliased(a4, a5, LoadWithVectorDescriptor::SlotRegister(), 313 DCHECK(!AreAliased(a4, a5, LoadWithVectorDescriptor::SlotRegister(),
314 LoadWithVectorDescriptor::VectorRegister())); 314 LoadWithVectorDescriptor::VectorRegister()));
315 __ IncrementCounter(isolate->counters()->load_miss(), 1, a4, a5); 315 __ IncrementCounter(isolate->counters()->load_miss(), 1, a4, a5);
316 316
317 LoadIC_PushArgs(masm); 317 LoadIC_PushArgs(masm);
318 318
319 // Perform tail call to the entry. 319 // Perform tail call to the entry.
320 ExternalReference ref = ExternalReference(IC_Utility(kLoadIC_Miss), isolate);
321 int arg_count = 4; 320 int arg_count = 4;
322 __ TailCallExternalReference(ref, arg_count, 1); 321 __ TailCallRuntime(Runtime::kLoadIC_Miss, arg_count, 1);
323 } 322 }
324 323
325 324
326 void LoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm, 325 void LoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm,
327 LanguageMode language_mode) { 326 LanguageMode language_mode) {
328 // The return address is in ra. 327 // The return address is in ra.
329 328
330 __ mov(LoadIC_TempRegister(), LoadDescriptor::ReceiverRegister()); 329 __ mov(LoadIC_TempRegister(), LoadDescriptor::ReceiverRegister());
331 __ Push(LoadIC_TempRegister(), LoadDescriptor::NameRegister()); 330 __ Push(LoadIC_TempRegister(), LoadDescriptor::NameRegister());
332 331
333 // Do tail-call to runtime routine. 332 // Do tail-call to runtime routine.
334 __ TailCallRuntime(is_strong(language_mode) ? Runtime::kGetPropertyStrong 333 __ TailCallRuntime(is_strong(language_mode) ? Runtime::kGetPropertyStrong
335 : Runtime::kGetProperty, 334 : Runtime::kGetProperty,
336 2, 1); 335 2, 1);
337 } 336 }
338 337
339 338
340 void KeyedLoadIC::GenerateMiss(MacroAssembler* masm) { 339 void KeyedLoadIC::GenerateMiss(MacroAssembler* masm) {
341 // The return address is in ra. 340 // The return address is in ra.
342 Isolate* isolate = masm->isolate(); 341 Isolate* isolate = masm->isolate();
343 342
344 DCHECK(!AreAliased(a4, a5, LoadWithVectorDescriptor::SlotRegister(), 343 DCHECK(!AreAliased(a4, a5, LoadWithVectorDescriptor::SlotRegister(),
345 LoadWithVectorDescriptor::VectorRegister())); 344 LoadWithVectorDescriptor::VectorRegister()));
346 __ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, a4, a5); 345 __ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, a4, a5);
347 346
348 LoadIC_PushArgs(masm); 347 LoadIC_PushArgs(masm);
349 348
350 // Perform tail call to the entry. 349 // Perform tail call to the entry.
351 ExternalReference ref =
352 ExternalReference(IC_Utility(kKeyedLoadIC_Miss), isolate);
353
354 int arg_count = 4; 350 int arg_count = 4;
355 __ TailCallExternalReference(ref, arg_count, 1); 351 __ TailCallRuntime(Runtime::kKeyedLoadIC_Miss, arg_count, 1);
356 } 352 }
357 353
358 354
359 void KeyedLoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm, 355 void KeyedLoadIC::GenerateRuntimeGetProperty(MacroAssembler* masm,
360 LanguageMode language_mode) { 356 LanguageMode language_mode) {
361 // The return address is in ra. 357 // The return address is in ra.
362 358
363 __ Push(LoadDescriptor::ReceiverRegister(), LoadDescriptor::NameRegister()); 359 __ Push(LoadDescriptor::ReceiverRegister(), LoadDescriptor::NameRegister());
364 360
365 // Do tail-call to runtime routine. 361 // Do tail-call to runtime routine.
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742 __ bind(&miss); 738 __ bind(&miss);
743 GenerateMiss(masm); 739 GenerateMiss(masm);
744 } 740 }
745 741
746 742
747 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) { 743 void KeyedStoreIC::GenerateMiss(MacroAssembler* masm) {
748 // Push receiver, key and value for runtime call. 744 // Push receiver, key and value for runtime call.
749 __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(), 745 __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
750 StoreDescriptor::ValueRegister()); 746 StoreDescriptor::ValueRegister());
751 747
752 ExternalReference ref = 748 __ TailCallRuntime(Runtime::kKeyedStoreIC_Miss, 3, 1);
753 ExternalReference(IC_Utility(kKeyedStoreIC_Miss), masm->isolate());
754 __ TailCallExternalReference(ref, 3, 1);
755 } 749 }
756 750
757 751
758 void StoreIC::GenerateMegamorphic(MacroAssembler* masm) { 752 void StoreIC::GenerateMegamorphic(MacroAssembler* masm) {
759 Register receiver = StoreDescriptor::ReceiverRegister(); 753 Register receiver = StoreDescriptor::ReceiverRegister();
760 Register name = StoreDescriptor::NameRegister(); 754 Register name = StoreDescriptor::NameRegister();
761 DCHECK(receiver.is(a1)); 755 DCHECK(receiver.is(a1));
762 DCHECK(name.is(a2)); 756 DCHECK(name.is(a2));
763 DCHECK(StoreDescriptor::ValueRegister().is(a0)); 757 DCHECK(StoreDescriptor::ValueRegister().is(a0));
764 758
765 // Get the receiver from the stack and probe the stub cache. 759 // Get the receiver from the stack and probe the stub cache.
766 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( 760 Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
767 Code::ComputeHandlerFlags(Code::STORE_IC)); 761 Code::ComputeHandlerFlags(Code::STORE_IC));
768 masm->isolate()->stub_cache()->GenerateProbe( 762 masm->isolate()->stub_cache()->GenerateProbe(
769 masm, Code::STORE_IC, flags, false, receiver, name, a3, a4, a5, a6); 763 masm, Code::STORE_IC, flags, false, receiver, name, a3, a4, a5, a6);
770 764
771 // Cache miss: Jump to runtime. 765 // Cache miss: Jump to runtime.
772 GenerateMiss(masm); 766 GenerateMiss(masm);
773 } 767 }
774 768
775 769
776 void StoreIC::GenerateMiss(MacroAssembler* masm) { 770 void StoreIC::GenerateMiss(MacroAssembler* masm) {
777 __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(), 771 __ Push(StoreDescriptor::ReceiverRegister(), StoreDescriptor::NameRegister(),
778 StoreDescriptor::ValueRegister()); 772 StoreDescriptor::ValueRegister());
779 // Perform tail call to the entry. 773 // Perform tail call to the entry.
780 ExternalReference ref = 774 __ TailCallRuntime(Runtime::kStoreIC_Miss, 3, 1);
781 ExternalReference(IC_Utility(kStoreIC_Miss), masm->isolate());
782 __ TailCallExternalReference(ref, 3, 1);
783 } 775 }
784 776
785 777
786 void StoreIC::GenerateNormal(MacroAssembler* masm) { 778 void StoreIC::GenerateNormal(MacroAssembler* masm) {
787 Label miss; 779 Label miss;
788 Register receiver = StoreDescriptor::ReceiverRegister(); 780 Register receiver = StoreDescriptor::ReceiverRegister();
789 Register name = StoreDescriptor::NameRegister(); 781 Register name = StoreDescriptor::NameRegister();
790 Register value = StoreDescriptor::ValueRegister(); 782 Register value = StoreDescriptor::ValueRegister();
791 Register dictionary = a3; 783 Register dictionary = a3;
792 DCHECK(!AreAliased(value, receiver, name, dictionary, a4, a5)); 784 DCHECK(!AreAliased(value, receiver, name, dictionary, a4, a5));
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896 patcher.ChangeBranchCondition(ne); 888 patcher.ChangeBranchCondition(ne);
897 } else { 889 } else {
898 DCHECK(Assembler::IsBne(branch_instr)); 890 DCHECK(Assembler::IsBne(branch_instr));
899 patcher.ChangeBranchCondition(eq); 891 patcher.ChangeBranchCondition(eq);
900 } 892 }
901 } 893 }
902 } // namespace internal 894 } // namespace internal
903 } // namespace v8 895 } // namespace v8
904 896
905 #endif // V8_TARGET_ARCH_MIPS64 897 #endif // V8_TARGET_ARCH_MIPS64
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