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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // NOLINT | 5 #include "vm/globals.h" // NOLINT |
6 #if defined(TARGET_ARCH_X64) | 6 #if defined(TARGET_ARCH_X64) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
10 #include "vm/heap.h" | 10 #include "vm/heap.h" |
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3178 pushq(TMP); // Preserve TMP register. | 3178 pushq(TMP); // Preserve TMP register. |
3179 pushq(RDI); // Preserve RDI register. | 3179 pushq(RDI); // Preserve RDI register. |
3180 if (fixed_length_encoding) { | 3180 if (fixed_length_encoding) { |
3181 AssemblerBuffer::EnsureCapacity ensured(&buffer_); | 3181 AssemblerBuffer::EnsureCapacity ensured(&buffer_); |
3182 EmitRegisterREX(RDI, REX_W); | 3182 EmitRegisterREX(RDI, REX_W); |
3183 EmitUint8(0xB8 | (RDI & 7)); | 3183 EmitUint8(0xB8 | (RDI & 7)); |
3184 EmitInt64(message_address); | 3184 EmitInt64(message_address); |
3185 } else { | 3185 } else { |
3186 LoadImmediate(RDI, Immediate(message_address), PP); | 3186 LoadImmediate(RDI, Immediate(message_address), PP); |
3187 } | 3187 } |
3188 call(&Isolate::Current()->stub_code()->PrintStopMessageLabel()); | 3188 call(&StubCode::PrintStopMessageLabel()); |
3189 popq(RDI); // Restore RDI register. | 3189 popq(RDI); // Restore RDI register. |
3190 popq(TMP); // Restore TMP register. | 3190 popq(TMP); // Restore TMP register. |
3191 } else { | 3191 } else { |
3192 // Emit the lower half and the higher half of the message address as | 3192 // Emit the lower half and the higher half of the message address as |
3193 // immediate operands in the test rax instructions. | 3193 // immediate operands in the test rax instructions. |
3194 testl(RAX, Immediate(Utils::Low32Bits(message_address))); | 3194 testl(RAX, Immediate(Utils::Low32Bits(message_address))); |
3195 testl(RAX, Immediate(Utils::High32Bits(message_address))); | 3195 testl(RAX, Immediate(Utils::High32Bits(message_address))); |
3196 } | 3196 } |
3197 // Emit the int3 instruction. | 3197 // Emit the int3 instruction. |
3198 int3(); // Execution can be resumed with the 'cont' command in gdb. | 3198 int3(); // Execution can be resumed with the 'cont' command in gdb. |
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3433 | 3433 |
3434 void Assembler::LeaveStubFrame() { | 3434 void Assembler::LeaveStubFrame() { |
3435 // Restore caller's PP register that was pushed in EnterStubFrame. | 3435 // Restore caller's PP register that was pushed in EnterStubFrame. |
3436 movq(PP, Address(RBP, (kSavedCallerPpSlotFromFp * kWordSize))); | 3436 movq(PP, Address(RBP, (kSavedCallerPpSlotFromFp * kWordSize))); |
3437 LeaveFrame(); | 3437 LeaveFrame(); |
3438 } | 3438 } |
3439 | 3439 |
3440 | 3440 |
3441 void Assembler::MaybeTraceAllocation(intptr_t cid, | 3441 void Assembler::MaybeTraceAllocation(intptr_t cid, |
3442 Label* trace, | 3442 Label* trace, |
3443 bool near_jump) { | 3443 bool near_jump, |
| 3444 bool inline_isolate) { |
3444 ASSERT(cid > 0); | 3445 ASSERT(cid > 0); |
3445 intptr_t state_offset; | 3446 intptr_t state_offset = ClassTable::StateOffsetFor(cid); |
3446 ClassTable* class_table = Isolate::Current()->class_table(); | |
3447 ClassHeapStats** table_ptr = | |
3448 class_table->StateAddressFor(cid, &state_offset); | |
3449 Register temp_reg = TMP; | 3447 Register temp_reg = TMP; |
3450 if (cid < kNumPredefinedCids) { | 3448 if (inline_isolate) { |
3451 movq(temp_reg, Immediate(reinterpret_cast<uword>(*table_ptr))); | 3449 ClassTable* class_table = Isolate::Current()->class_table(); |
| 3450 ClassHeapStats** table_ptr = class_table->TableAddressFor(cid); |
| 3451 if (cid < kNumPredefinedCids) { |
| 3452 movq(temp_reg, Immediate(reinterpret_cast<uword>(*table_ptr))); |
| 3453 } else { |
| 3454 movq(temp_reg, Immediate(reinterpret_cast<uword>(table_ptr))); |
| 3455 movq(temp_reg, Address(temp_reg, 0)); |
| 3456 } |
3452 } else { | 3457 } else { |
3453 Register temp_reg = TMP; | 3458 LoadIsolate(temp_reg); |
3454 movq(temp_reg, Immediate(reinterpret_cast<uword>(table_ptr))); | 3459 intptr_t table_offset = |
3455 movq(temp_reg, Address(temp_reg, 0)); | 3460 Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid); |
| 3461 movq(temp_reg, Address(temp_reg, table_offset)); |
3456 } | 3462 } |
3457 testb(Address(temp_reg, state_offset), | 3463 testb(Address(temp_reg, state_offset), |
3458 Immediate(ClassHeapStats::TraceAllocationMask())); | 3464 Immediate(ClassHeapStats::TraceAllocationMask())); |
3459 // We are tracing for this class, jump to the trace label which will use | 3465 // We are tracing for this class, jump to the trace label which will use |
3460 // the allocation stub. | 3466 // the allocation stub. |
3461 j(NOT_ZERO, trace, near_jump); | 3467 j(NOT_ZERO, trace, near_jump); |
3462 } | 3468 } |
3463 | 3469 |
3464 | 3470 |
3465 void Assembler::UpdateAllocationStats(intptr_t cid, | 3471 void Assembler::UpdateAllocationStats(intptr_t cid, |
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3927 | 3933 |
3928 | 3934 |
3929 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3935 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
3930 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); | 3936 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); |
3931 return xmm_reg_names[reg]; | 3937 return xmm_reg_names[reg]; |
3932 } | 3938 } |
3933 | 3939 |
3934 } // namespace dart | 3940 } // namespace dart |
3935 | 3941 |
3936 #endif // defined TARGET_ARCH_X64 | 3942 #endif // defined TARGET_ARCH_X64 |
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