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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // NOLINT | 5 #include "vm/globals.h" // NOLINT |
6 #if defined(TARGET_ARCH_ARM64) | 6 #if defined(TARGET_ARCH_ARM64) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
10 #include "vm/longjump.h" | 10 #include "vm/longjump.h" |
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1295 str(TMP, Address(TMP2, count_field_offset)); | 1295 str(TMP, Address(TMP2, count_field_offset)); |
1296 ldr(TMP, Address(TMP2, size_field_offset)); | 1296 ldr(TMP, Address(TMP2, size_field_offset)); |
1297 add(TMP, TMP, Operand(size_reg)); | 1297 add(TMP, TMP, Operand(size_reg)); |
1298 str(TMP, Address(TMP2, size_field_offset)); | 1298 str(TMP, Address(TMP2, size_field_offset)); |
1299 } | 1299 } |
1300 | 1300 |
1301 | 1301 |
1302 void Assembler::MaybeTraceAllocation(intptr_t cid, | 1302 void Assembler::MaybeTraceAllocation(intptr_t cid, |
1303 Register temp_reg, | 1303 Register temp_reg, |
1304 Register pp, | 1304 Register pp, |
1305 Label* trace) { | 1305 Label* trace, |
| 1306 bool inline_isolate) { |
1306 ASSERT(cid > 0); | 1307 ASSERT(cid > 0); |
1307 intptr_t state_offset; | 1308 intptr_t state_offset = ClassTable::StateOffsetFor(cid); |
1308 ClassTable* class_table = Isolate::Current()->class_table(); | 1309 if (inline_isolate) { |
1309 ClassHeapStats** table_ptr = | 1310 ClassTable* class_table = Isolate::Current()->class_table(); |
1310 class_table->StateAddressFor(cid, &state_offset); | 1311 ClassHeapStats** table_ptr = class_table->TableAddressFor(cid); |
1311 | 1312 if (cid < kNumPredefinedCids) { |
1312 if (cid < kNumPredefinedCids) { | 1313 LoadImmediate( |
1313 LoadImmediate( | 1314 temp_reg, reinterpret_cast<uword>(*table_ptr) + state_offset, pp); |
1314 temp_reg, reinterpret_cast<uword>(*table_ptr) + state_offset, pp); | 1315 } else { |
| 1316 LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr), pp); |
| 1317 ldr(temp_reg, Address(temp_reg, 0)); |
| 1318 AddImmediate(temp_reg, temp_reg, state_offset, pp); |
| 1319 } |
1315 } else { | 1320 } else { |
1316 LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr), pp); | 1321 LoadIsolate(temp_reg); |
1317 ldr(temp_reg, Address(temp_reg, 0)); | 1322 intptr_t table_offset = |
| 1323 Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid); |
| 1324 ldr(temp_reg, Address(temp_reg, table_offset)); |
1318 AddImmediate(temp_reg, temp_reg, state_offset, pp); | 1325 AddImmediate(temp_reg, temp_reg, state_offset, pp); |
1319 } | 1326 } |
1320 ldr(temp_reg, Address(temp_reg, 0)); | 1327 ldr(temp_reg, Address(temp_reg, 0)); |
1321 tsti(temp_reg, Immediate(ClassHeapStats::TraceAllocationMask())); | 1328 tsti(temp_reg, Immediate(ClassHeapStats::TraceAllocationMask())); |
1322 b(trace, NE); | 1329 b(trace, NE); |
1323 } | 1330 } |
1324 | 1331 |
1325 | 1332 |
1326 void Assembler::TryAllocate(const Class& cls, | 1333 void Assembler::TryAllocate(const Class& cls, |
1327 Label* failure, | 1334 Label* failure, |
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1457 add(base, array, Operand(index, LSL, shift)); | 1464 add(base, array, Operand(index, LSL, shift)); |
1458 } | 1465 } |
1459 const OperandSize size = Address::OperandSizeFor(cid); | 1466 const OperandSize size = Address::OperandSizeFor(cid); |
1460 ASSERT(Address::CanHoldOffset(offset, Address::Offset, size)); | 1467 ASSERT(Address::CanHoldOffset(offset, Address::Offset, size)); |
1461 return Address(base, offset, Address::Offset, size); | 1468 return Address(base, offset, Address::Offset, size); |
1462 } | 1469 } |
1463 | 1470 |
1464 } // namespace dart | 1471 } // namespace dart |
1465 | 1472 |
1466 #endif // defined TARGET_ARCH_ARM64 | 1473 #endif // defined TARGET_ARCH_ARM64 |
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