Make array allocation stub shared between isolates.

runtime/vm/assembler_arm64.cc

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/globals.h"  // NOLINT
 #if defined(TARGET_ARCH_ARM64)
 
 #include "vm/assembler.h"
 #include "vm/cpu.h"
 #include "vm/longjump.h"
@@ skipping 1284 matching lines @@
   str(TMP, Address(TMP2, count_field_offset));
   ldr(TMP, Address(TMP2, size_field_offset));
   add(TMP, TMP, Operand(size_reg));
   str(TMP, Address(TMP2, size_field_offset));
 }
 
 
 void Assembler::MaybeTraceAllocation(intptr_t cid,
                                      Register temp_reg,
                                      Register pp,
-                                     Label* trace) {
+                                     Label* trace,
+                                     bool inline_isolate) {
   ASSERT(cid > 0);
-  intptr_t state_offset;
-  ClassTable* class_table = Isolate::Current()->class_table();
-  ClassHeapStats** table_ptr =
-      class_table->StateAddressFor(cid, &state_offset);
-
-  if (cid < kNumPredefinedCids) {
-    LoadImmediate(
-        temp_reg, reinterpret_cast<uword>(*table_ptr) + state_offset, pp);
+  intptr_t state_offset = ClassTable::StateOffsetFor(cid);
+  if (inline_isolate) {
+    ClassTable* class_table = Isolate::Current()->class_table();
+    ClassHeapStats** table_ptr = class_table->TableAddressFor(cid);
+    if (cid < kNumPredefinedCids) {
+      LoadImmediate(
+          temp_reg, reinterpret_cast<uword>(*table_ptr) + state_offset, pp);
+    } else {
+      LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr), pp);
+      ldr(temp_reg, Address(temp_reg, 0));
+      AddImmediate(temp_reg, temp_reg, state_offset, pp);
+    }
   } else {
-    LoadImmediate(temp_reg, reinterpret_cast<uword>(table_ptr), pp);
-    ldr(temp_reg, Address(temp_reg, 0));
+    LoadIsolate(temp_reg);
+    intptr_t table_offset =
+        Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid);
+    ldr(temp_reg, Address(temp_reg, table_offset));
     AddImmediate(temp_reg, temp_reg, state_offset, pp);
   }
   ldr(temp_reg, Address(temp_reg, 0));
   tsti(temp_reg, Immediate(ClassHeapStats::TraceAllocationMask()));
   b(trace, NE);
 }
 
 
 void Assembler::TryAllocate(const Class& cls,
                             Label* failure,
@@ skipping 129 matching lines @@
     add(base, array, Operand(index, LSL, shift));
   }
   const OperandSize size = Address::OperandSizeFor(cid);
   ASSERT(Address::CanHoldOffset(offset, Address::Offset, size));
   return Address(base, offset, Address::Offset, size);
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM64