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| 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" // NOLINT | 5 #include "vm/globals.h" // NOLINT |
| 6 #if defined(TARGET_ARCH_ARM) | 6 #if defined(TARGET_ARCH_ARM) |
| 7 | 7 |
| 8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
| 9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
| 10 #include "vm/longjump.h" | 10 #include "vm/longjump.h" |
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| 3366 intptr_t table_offset = | 3366 intptr_t table_offset = |
| 3367 Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid); | 3367 Isolate::class_table_offset() + ClassTable::TableOffsetFor(cid); |
| 3368 ldr(dest, Address(dest, table_offset)); | 3368 ldr(dest, Address(dest, table_offset)); |
| 3369 AddImmediate(dest, class_offset); | 3369 AddImmediate(dest, class_offset); |
| 3370 } | 3370 } |
| 3371 } | 3371 } |
| 3372 | 3372 |
| 3373 | 3373 |
| 3374 void Assembler::MaybeTraceAllocation(intptr_t cid, | 3374 void Assembler::MaybeTraceAllocation(intptr_t cid, |
| 3375 Register temp_reg, | 3375 Register temp_reg, |
| 3376 Label* trace) { | 3376 Label* trace, |
| 3377 LoadAllocationStatsAddress(temp_reg, cid); | 3377 bool inline_isolate) { |
| 3378 LoadAllocationStatsAddress(temp_reg, cid, inline_isolate); |
| 3378 const uword state_offset = ClassHeapStats::state_offset(); | 3379 const uword state_offset = ClassHeapStats::state_offset(); |
| 3379 ldr(temp_reg, Address(temp_reg, state_offset)); | 3380 ldr(temp_reg, Address(temp_reg, state_offset)); |
| 3380 tst(temp_reg, Operand(ClassHeapStats::TraceAllocationMask())); | 3381 tst(temp_reg, Operand(ClassHeapStats::TraceAllocationMask())); |
| 3381 b(trace, NE); | 3382 b(trace, NE); |
| 3382 } | 3383 } |
| 3383 | 3384 |
| 3384 | 3385 |
| 3385 void Assembler::IncrementAllocationStats(Register stats_addr_reg, | 3386 void Assembler::IncrementAllocationStats(Register stats_addr_reg, |
| 3386 intptr_t cid, | 3387 intptr_t cid, |
| 3387 Heap::Space space) { | 3388 Heap::Space space) { |
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| 3520 LoadImmediate(temp1, instance_size); | 3521 LoadImmediate(temp1, instance_size); |
| 3521 IncrementAllocationStatsWithSize(temp2, temp1, space); | 3522 IncrementAllocationStatsWithSize(temp2, temp1, space); |
| 3522 } else { | 3523 } else { |
| 3523 b(failure); | 3524 b(failure); |
| 3524 } | 3525 } |
| 3525 } | 3526 } |
| 3526 | 3527 |
| 3527 | 3528 |
| 3528 void Assembler::Stop(const char* message) { | 3529 void Assembler::Stop(const char* message) { |
| 3529 if (FLAG_print_stop_message) { | 3530 if (FLAG_print_stop_message) { |
| 3530 StubCode* stub_code = Isolate::Current()->stub_code(); | |
| 3531 PushList((1 << R0) | (1 << IP) | (1 << LR)); // Preserve R0, IP, LR. | 3531 PushList((1 << R0) | (1 << IP) | (1 << LR)); // Preserve R0, IP, LR. |
| 3532 LoadImmediate(R0, reinterpret_cast<int32_t>(message)); | 3532 LoadImmediate(R0, reinterpret_cast<int32_t>(message)); |
| 3533 // PrintStopMessage() preserves all registers. | 3533 // PrintStopMessage() preserves all registers. |
| 3534 BranchLink(&stub_code->PrintStopMessageLabel()); // Passing message in R0. | 3534 BranchLink(&StubCode::PrintStopMessageLabel()); // Passing message in R0. |
| 3535 PopList((1 << R0) | (1 << IP) | (1 << LR)); // Restore R0, IP, LR. | 3535 PopList((1 << R0) | (1 << IP) | (1 << LR)); // Restore R0, IP, LR. |
| 3536 } | 3536 } |
| 3537 // Emit the message address before the svc instruction, so that we can | 3537 // Emit the message address before the svc instruction, so that we can |
| 3538 // 'unstop' and continue execution in the simulator or jump to the next | 3538 // 'unstop' and continue execution in the simulator or jump to the next |
| 3539 // instruction in gdb. | 3539 // instruction in gdb. |
| 3540 Label stop; | 3540 Label stop; |
| 3541 b(&stop); | 3541 b(&stop); |
| 3542 Emit(reinterpret_cast<int32_t>(message)); | 3542 Emit(reinterpret_cast<int32_t>(message)); |
| 3543 Bind(&stop); | 3543 Bind(&stop); |
| 3544 bkpt(Instr::kStopMessageCode); | 3544 bkpt(Instr::kStopMessageCode); |
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| 3633 | 3633 |
| 3634 | 3634 |
| 3635 const char* Assembler::FpuRegisterName(FpuRegister reg) { | 3635 const char* Assembler::FpuRegisterName(FpuRegister reg) { |
| 3636 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); | 3636 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); |
| 3637 return fpu_reg_names[reg]; | 3637 return fpu_reg_names[reg]; |
| 3638 } | 3638 } |
| 3639 | 3639 |
| 3640 } // namespace dart | 3640 } // namespace dart |
| 3641 | 3641 |
| 3642 #endif // defined TARGET_ARCH_ARM | 3642 #endif // defined TARGET_ARCH_ARM |
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