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Side by Side Diff: src/IceTargetLoweringMIPS32.h

Issue 1246013004: Make ARM RegNames[] static like X86 (no ARM syms in X86-only build). (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 5 years, 5 months ago
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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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122 const llvm::SmallBitVector &ExcludeRegisters) const override; 122 const llvm::SmallBitVector &ExcludeRegisters) const override;
123 123
124 static Type stackSlotType(); 124 static Type stackSlotType();
125 125
126 bool UsesFramePointer = false; 126 bool UsesFramePointer = false;
127 bool NeedsStackAlignment = false; 127 bool NeedsStackAlignment = false;
128 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM]; 128 llvm::SmallBitVector TypeToRegisterSet[IceType_NUM];
129 llvm::SmallBitVector ScratchRegs; 129 llvm::SmallBitVector ScratchRegs;
130 llvm::SmallBitVector RegsUsed; 130 llvm::SmallBitVector RegsUsed;
131 VarList PhysicalRegisters[IceType_NUM]; 131 VarList PhysicalRegisters[IceType_NUM];
132 static IceString RegNames[];
133 132
134 private: 133 private:
135 ~TargetMIPS32() override = default; 134 ~TargetMIPS32() override = default;
136 }; 135 };
137 136
138 class TargetDataMIPS32 final : public TargetDataLowering { 137 class TargetDataMIPS32 final : public TargetDataLowering {
139 TargetDataMIPS32() = delete; 138 TargetDataMIPS32() = delete;
140 TargetDataMIPS32(const TargetDataMIPS32 &) = delete; 139 TargetDataMIPS32(const TargetDataMIPS32 &) = delete;
141 TargetDataMIPS32 &operator=(const TargetDataMIPS32 &) = delete; 140 TargetDataMIPS32 &operator=(const TargetDataMIPS32 &) = delete;
142 141
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170 protected: 169 protected:
171 explicit TargetHeaderMIPS32(GlobalContext *Ctx); 170 explicit TargetHeaderMIPS32(GlobalContext *Ctx);
172 171
173 private: 172 private:
174 ~TargetHeaderMIPS32() = default; 173 ~TargetHeaderMIPS32() = default;
175 }; 174 };
176 175
177 } // end of namespace Ice 176 } // end of namespace Ice
178 177
179 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H 178 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H
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