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1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// | 1 //===- subzero/src/IceTargetLoweringMIPS32.cpp - MIPS32 lowering ----------===// |
2 // | 2 // |
3 // The Subzero Code Generator | 3 // The Subzero Code Generator |
4 // | 4 // |
5 // This file is distributed under the University of Illinois Open Source | 5 // This file is distributed under the University of Illinois Open Source |
6 // License. See LICENSE.TXT for details. | 6 // License. See LICENSE.TXT for details. |
7 // | 7 // |
8 //===----------------------------------------------------------------------===// | 8 //===----------------------------------------------------------------------===// |
9 /// | 9 /// |
10 /// \file | 10 /// \file |
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213 } | 213 } |
214 } | 214 } |
215 | 215 |
216 bool TargetMIPS32::doBranchOpt(Inst *I, const CfgNode *NextNode) { | 216 bool TargetMIPS32::doBranchOpt(Inst *I, const CfgNode *NextNode) { |
217 (void)I; | 217 (void)I; |
218 (void)NextNode; | 218 (void)NextNode; |
219 UnimplementedError(Func->getContext()->getFlags()); | 219 UnimplementedError(Func->getContext()->getFlags()); |
220 return false; | 220 return false; |
221 } | 221 } |
222 | 222 |
223 IceString TargetMIPS32::RegNames[] = { | |
224 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \ | |
225 isFP) \ | |
226 name, | |
227 REGMIPS32_TABLE | |
228 #undef X | |
229 }; | |
230 | |
231 IceString TargetMIPS32::getRegName(SizeT RegNum, Type Ty) const { | 223 IceString TargetMIPS32::getRegName(SizeT RegNum, Type Ty) const { |
232 assert(RegNum < RegMIPS32::Reg_NUM); | 224 assert(RegNum < RegMIPS32::Reg_NUM); |
233 (void)Ty; | 225 (void)Ty; |
| 226 static const char *RegNames[] = { |
| 227 #define X(val, encode, name, scratch, preserved, stackptr, frameptr, isInt, \ |
| 228 isFP) \ |
| 229 name, |
| 230 REGMIPS32_TABLE |
| 231 #undef X |
| 232 }; |
234 return RegNames[RegNum]; | 233 return RegNames[RegNum]; |
235 } | 234 } |
236 | 235 |
237 Variable *TargetMIPS32::getPhysicalRegister(SizeT RegNum, Type Ty) { | 236 Variable *TargetMIPS32::getPhysicalRegister(SizeT RegNum, Type Ty) { |
238 if (Ty == IceType_void) | 237 if (Ty == IceType_void) |
239 Ty = IceType_i32; | 238 Ty = IceType_i32; |
240 if (PhysicalRegisters[Ty].empty()) | 239 if (PhysicalRegisters[Ty].empty()) |
241 PhysicalRegisters[Ty].resize(RegMIPS32::Reg_NUM); | 240 PhysicalRegisters[Ty].resize(RegMIPS32::Reg_NUM); |
242 assert(RegNum < PhysicalRegisters[Ty].size()); | 241 assert(RegNum < PhysicalRegisters[Ty].size()); |
243 Variable *Reg = PhysicalRegisters[Ty][RegNum]; | 242 Variable *Reg = PhysicalRegisters[Ty][RegNum]; |
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710 void TargetDataMIPS32::lowerConstants() { | 709 void TargetDataMIPS32::lowerConstants() { |
711 if (Ctx->getFlags().getDisableTranslation()) | 710 if (Ctx->getFlags().getDisableTranslation()) |
712 return; | 711 return; |
713 UnimplementedError(Ctx->getFlags()); | 712 UnimplementedError(Ctx->getFlags()); |
714 } | 713 } |
715 | 714 |
716 TargetHeaderMIPS32::TargetHeaderMIPS32(GlobalContext *Ctx) | 715 TargetHeaderMIPS32::TargetHeaderMIPS32(GlobalContext *Ctx) |
717 : TargetHeaderLowering(Ctx) {} | 716 : TargetHeaderLowering(Ctx) {} |
718 | 717 |
719 } // end of namespace Ice | 718 } // end of namespace Ice |
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