Adds muls, sdiv, udiv instructions to ARM simulator, assembler, disassembler

runtime/vm/assembler_arm_test.cc

Index: runtime/vm/assembler_arm_test.cc
===================================================================
--- runtime/vm/assembler_arm_test.cc	(revision 19488)
+++ runtime/vm/assembler_arm_test.cc	(working copy)
@@ -1423,6 +1423,119 @@
 }
 
 
+ASSEMBLER_TEST_GENERATE(Udiv, assembler) {
+  __ mov(R0, ShifterOperand(27));
+  __ mov(R1, ShifterOperand(9));
+  __ udiv(R2, R0, R1);
+  __ Mov(R0, R2);
+  __ mov(PC, ShifterOperand(LR));
+}
+
+
+ASSEMBLER_TEST_RUN(Udiv, test) {
+  EXPECT(test != NULL);
+  typedef int (*Tst)();
+  EXPECT_EQ(3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Sdiv, assembler) {
+  __ mov(R0, ShifterOperand(27));
+  __ LoadImmediate(R1, -9);
+  __ sdiv(R2, R0, R1);
+  __ Mov(R0, R2);
+  __ mov(PC, ShifterOperand(LR));
+}
+
+
+ASSEMBLER_TEST_RUN(Sdiv, test) {
+  EXPECT(test != NULL);
+  typedef int (*Tst)();
+  EXPECT_EQ(-3, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Udiv_zero, assembler) {
+  __ mov(R0, ShifterOperand(27));
+  __ mov(R1, ShifterOperand(0));
+  __ udiv(R2, R0, R1);
+  __ Mov(R0, R2);
+  __ mov(PC, ShifterOperand(LR));
+}
+
+
+ASSEMBLER_TEST_RUN(Udiv_zero, test) {
+  EXPECT(test != NULL);
+  typedef int (*Tst)();
+  EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Sdiv_zero, assembler) {
+  __ mov(R0, ShifterOperand(27));
+  __ mov(R1, ShifterOperand(0));
+  __ udiv(R2, R0, R1);
+  __ Mov(R0, R2);
+  __ mov(PC, ShifterOperand(LR));
+}
+
+
+ASSEMBLER_TEST_RUN(Sdiv_zero, test) {
+  EXPECT(test != NULL);
+  typedef int (*Tst)();
+  EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Udiv_corner, assembler) {
+  __ LoadImmediate(R0, 0x80000000);
+  __ LoadImmediate(R1, 0xffffffff);
+  __ udiv(R2, R0, R1);
+  __ Mov(R0, R2);
+  __ mov(PC, ShifterOperand(LR));
+}
+
+
+ASSEMBLER_TEST_RUN(Udiv_corner, test) {
+  EXPECT(test != NULL);
+  typedef int (*Tst)();
+  EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Sdiv_corner, assembler) {
+  __ LoadImmediate(R0, 0x80000000);
+  __ LoadImmediate(R1, 0xffffffff);
+  __ sdiv(R2, R0, R1);
+  __ Mov(R0, R2);
+  __ mov(PC, ShifterOperand(LR));
+}
+
+
+ASSEMBLER_TEST_RUN(Sdiv_corner, test) {
+  EXPECT(test != NULL);
+  typedef int (*Tst)();
+  EXPECT_EQ(static_cast<int32_t>(0x80000000),
+            EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
+}
+
+
+ASSEMBLER_TEST_GENERATE(Muls, assembler) {
+  __ mov(R0, ShifterOperand(3));
+  __ LoadImmediate(R1, -9);
+  __ muls(R2, R0, R1);
+  __ mov(R0, ShifterOperand(42), MI);
+  __ mov(PC, ShifterOperand(LR));
+}
+
+
+ASSEMBLER_TEST_RUN(Muls, test) {
+  EXPECT(test != NULL);
+  typedef int (*Tst)();
+  EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
+}
+
+
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM