Adds muls, sdiv, udiv instructions to ARM simulator, assembler, disassembler

runtime/vm/disassembler_arm.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/disassembler.h"
 
 #include "vm/globals.h"  // Needed here to get TARGET_ARCH_ARM.
 #if defined(TARGET_ARCH_ARM)
 #include "platform/assert.h"
 
@@ skipping 834 matching lines @@
     default: {
       // The PU field is a 2-bit field.
       UNREACHABLE();
       break;
     }
   }
 }
 
 
 void ARMDecoder::DecodeType3(Instr* instr) {
+  if (instr->IsDivision()) {
+    if (instr->Bit(21)) {
+      Format(instr, "udiv'cond 'rd, 'rn, 'rm");
+    } else {
+      Format(instr, "sdiv'cond 'rd, 'rn, 'rm");
+    }
+    return;
+  }
   switch (instr->PUField()) {
     case 0: {
       if (instr->HasW()) {
         Unknown(instr);
       } else {
         Format(instr, "'memop'cond'b 'rd, ['rn], -'shift_rm");
       }
       break;
     }
     case 1: {
@@ skipping 423 matching lines @@
                                   human_buffer,
                                   sizeof(human_buffer),
                                   pc);
     pc += instruction_length;
   }
 }
 
 }  // namespace dart
 
 #endif  // defined TARGET_ARCH_ARM