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Unified Diff: src/mips/lithium-codegen-mips.cc

Issue 12447010: MIPS: Fix code size assertions for branch delay slots. (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 10 months ago
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Index: src/mips/lithium-codegen-mips.cc
diff --git a/src/mips/lithium-codegen-mips.cc b/src/mips/lithium-codegen-mips.cc
index 194652562216c6bee905e3adce078794cfd591c8..eaf5b173d4a344181271d3b3f557833d1677c0a2 100644
--- a/src/mips/lithium-codegen-mips.cc
+++ b/src/mips/lithium-codegen-mips.cc
@@ -2527,11 +2527,12 @@ void LCodeGen::DoCmpT(LCmpT* instr) {
// A minor optimization that relies on LoadRoot always emitting one
// instruction.
Assembler::BlockTrampolinePoolScope block_trampoline_pool(masm());
- Label done;
+ Label done, check;
__ Branch(USE_DELAY_SLOT, &done, condition, v0, Operand(zero_reg));
+ __ bind(&check);
__ LoadRoot(ToRegister(instr->result()), Heap::kTrueValueRootIndex);
+ ASSERT_EQ(1, masm()->InstructionsGeneratedSince(&check));
__ LoadRoot(ToRegister(instr->result()), Heap::kFalseValueRootIndex);
- ASSERT_EQ(3, masm()->InstructionsGeneratedSince(&done));
__ bind(&done);
}
@@ -3506,8 +3507,6 @@ void LCodeGen::EmitIntegerMathAbs(LUnaryMathOperation* instr) {
Label done;
__ Branch(USE_DELAY_SLOT, &done, ge, input, Operand(zero_reg));
__ mov(result, input);
- ASSERT_EQ(2, masm()->InstructionsGeneratedSince(&done));
- __ subu(result, zero_reg, input);
// Overflow if result is still negative, i.e. 0x80000000.
DeoptimizeIf(lt, instr->environment(), result, Operand(zero_reg));
__ bind(&done);
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