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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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7131 // Internalized strings are compared by identity. | 7131 // Internalized strings are compared by identity. |
7132 __ Ret(ne, left, Operand(right)); | 7132 __ Ret(ne, left, Operand(right)); |
7133 __ li(v0, Operand(Smi::FromInt(EQUAL))); | 7133 __ li(v0, Operand(Smi::FromInt(EQUAL))); |
7134 __ Ret(); | 7134 __ Ret(); |
7135 | 7135 |
7136 __ bind(&miss); | 7136 __ bind(&miss); |
7137 GenerateMiss(masm); | 7137 GenerateMiss(masm); |
7138 } | 7138 } |
7139 | 7139 |
7140 | 7140 |
| 7141 void ICCompareStub::GenerateUniqueNames(MacroAssembler* masm) { |
| 7142 ASSERT(state_ == CompareIC::UNIQUE_NAME); |
| 7143 ASSERT(GetCondition() == eq); |
| 7144 Label miss; |
| 7145 |
| 7146 // Registers containing left and right operands respectively. |
| 7147 Register left = a1; |
| 7148 Register right = a0; |
| 7149 Register tmp1 = a2; |
| 7150 Register tmp2 = a3; |
| 7151 |
| 7152 // Check that both operands are heap objects. |
| 7153 __ JumpIfEitherSmi(left, right, &miss); |
| 7154 |
| 7155 // Check that both operands are unique names. This leaves the instance |
| 7156 // types loaded in tmp1 and tmp2. |
| 7157 STATIC_ASSERT(kInternalizedTag != 0); |
| 7158 __ lw(tmp1, FieldMemOperand(left, HeapObject::kMapOffset)); |
| 7159 __ lw(tmp2, FieldMemOperand(right, HeapObject::kMapOffset)); |
| 7160 __ lbu(tmp1, FieldMemOperand(tmp1, Map::kInstanceTypeOffset)); |
| 7161 __ lbu(tmp2, FieldMemOperand(tmp2, Map::kInstanceTypeOffset)); |
| 7162 |
| 7163 Label succeed1; |
| 7164 __ And(at, tmp1, Operand(kIsInternalizedMask)); |
| 7165 __ Branch(&succeed1, ne, at, Operand(zero_reg)); |
| 7166 __ Branch(&miss, ne, tmp1, Operand(SYMBOL_TYPE)); |
| 7167 __ bind(&succeed1); |
| 7168 |
| 7169 Label succeed2; |
| 7170 __ And(at, tmp2, Operand(kIsInternalizedMask)); |
| 7171 __ Branch(&succeed2, ne, at, Operand(zero_reg)); |
| 7172 __ Branch(&miss, ne, tmp2, Operand(SYMBOL_TYPE)); |
| 7173 __ bind(&succeed2); |
| 7174 |
| 7175 // Use a0 as result |
| 7176 __ mov(v0, a0); |
| 7177 |
| 7178 // Unique names are compared by identity. |
| 7179 Label done; |
| 7180 __ Branch(&done, ne, left, Operand(right)); |
| 7181 // Make sure a0 is non-zero. At this point input operands are |
| 7182 // guaranteed to be non-zero. |
| 7183 ASSERT(right.is(a0)); |
| 7184 STATIC_ASSERT(EQUAL == 0); |
| 7185 STATIC_ASSERT(kSmiTag == 0); |
| 7186 __ li(v0, Operand(Smi::FromInt(EQUAL))); |
| 7187 __ bind(&done); |
| 7188 __ Ret(); |
| 7189 |
| 7190 __ bind(&miss); |
| 7191 GenerateMiss(masm); |
| 7192 } |
| 7193 |
| 7194 |
7141 void ICCompareStub::GenerateStrings(MacroAssembler* masm) { | 7195 void ICCompareStub::GenerateStrings(MacroAssembler* masm) { |
7142 ASSERT(state_ == CompareIC::STRING); | 7196 ASSERT(state_ == CompareIC::STRING); |
7143 Label miss; | 7197 Label miss; |
7144 | 7198 |
7145 bool equality = Token::IsEqualityOp(op_); | 7199 bool equality = Token::IsEqualityOp(op_); |
7146 | 7200 |
7147 // Registers containing left and right operands respectively. | 7201 // Registers containing left and right operands respectively. |
7148 Register left = a1; | 7202 Register left = a1; |
7149 Register right = a0; | 7203 Register right = a0; |
7150 Register tmp1 = a2; | 7204 Register tmp1 = a2; |
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8022 __ Pop(ra, t1, a1); | 8076 __ Pop(ra, t1, a1); |
8023 __ Ret(); | 8077 __ Ret(); |
8024 } | 8078 } |
8025 | 8079 |
8026 | 8080 |
8027 #undef __ | 8081 #undef __ |
8028 | 8082 |
8029 } } // namespace v8::internal | 8083 } } // namespace v8::internal |
8030 | 8084 |
8031 #endif // V8_TARGET_ARCH_MIPS | 8085 #endif // V8_TARGET_ARCH_MIPS |
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