| Index: gdb/xtensa-tdep.c
|
| diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
|
| index b2a06176c5cd971086bd50bd4019b0cdf0401d77..d9b1a45a8d996c4a278d9137c510e9d3e8b1dbd0 100644
|
| --- a/gdb/xtensa-tdep.c
|
| +++ b/gdb/xtensa-tdep.c
|
| @@ -1,6 +1,6 @@
|
| /* Target-dependent code for the Xtensa port of GDB, the GNU debugger.
|
|
|
| - Copyright (C) 2003, 2005-2012 Free Software Foundation, Inc.
|
| + Copyright (C) 2003-2013 Free Software Foundation, Inc.
|
|
|
| This file is part of GDB.
|
|
|
| @@ -55,7 +55,7 @@
|
| #include "xtensa-config.h"
|
|
|
|
|
| -static int xtensa_debug_level = 0;
|
| +static unsigned int xtensa_debug_level = 0;
|
|
|
| #define DEBUGWARN(args...) \
|
| if (xtensa_debug_level > 0) \
|
| @@ -1154,7 +1154,7 @@ xtensa_scan_prologue (struct gdbarch *gdbarch, CORE_ADDR current_pc)
|
| CORE_ADDR start_addr;
|
| xtensa_isa isa;
|
| xtensa_insnbuf ins, slot;
|
| - char ibuf[XTENSA_ISA_BSZ];
|
| + gdb_byte ibuf[XTENSA_ISA_BSZ];
|
| CORE_ADDR ia, bt, ba;
|
| xtensa_format ifmt;
|
| int ilen, islots, is;
|
| @@ -2032,7 +2032,7 @@ call0_ret (CORE_ADDR start_pc, CORE_ADDR finish_pc)
|
| #define RETURN_RET goto done
|
| xtensa_isa isa;
|
| xtensa_insnbuf ins, slot;
|
| - char ibuf[XTENSA_ISA_BSZ];
|
| + gdb_byte ibuf[XTENSA_ISA_BSZ];
|
| CORE_ADDR ia, bt, ba;
|
| xtensa_format ifmt;
|
| int ilen, islots, is;
|
| @@ -2390,7 +2390,7 @@ call0_analyze_prologue (struct gdbarch *gdbarch,
|
| CORE_ADDR ia; /* Current insn address in prologue. */
|
| CORE_ADDR ba = 0; /* Current address at base of insn buffer. */
|
| CORE_ADDR bt; /* Current address at top+1 of insn buffer. */
|
| - char ibuf[XTENSA_ISA_BSZ];/* Instruction buffer for decoding prologue. */
|
| + gdb_byte ibuf[XTENSA_ISA_BSZ];/* Instruction buffer for decoding prologue. */
|
| xtensa_isa isa; /* libisa ISA handle. */
|
| xtensa_insnbuf ins, slot; /* libisa handle to decoded insn, slot. */
|
| xtensa_format ifmt; /* libisa instruction format. */
|
| @@ -2805,7 +2805,7 @@ execute_code (struct gdbarch *gdbarch, CORE_ADDR current_pc, CORE_ADDR wb)
|
| {
|
| xtensa_isa isa;
|
| xtensa_insnbuf ins, slot;
|
| - char ibuf[XTENSA_ISA_BSZ];
|
| + gdb_byte ibuf[XTENSA_ISA_BSZ];
|
| CORE_ADDR ia, bt, ba;
|
| xtensa_format ifmt;
|
| int ilen, islots, is;
|
| @@ -2814,7 +2814,7 @@ execute_code (struct gdbarch *gdbarch, CORE_ADDR current_pc, CORE_ADDR wb)
|
| int fail = 0;
|
| void (*func) (struct gdbarch *, int, int, int, CORE_ADDR);
|
|
|
| - int at, as, offset;
|
| + uint32_t at, as, offset;
|
|
|
| /* WindowUnderflow12 = true, when inside _WindowUnderflow12. */
|
| int WindowUnderflow12 = (current_pc & 0x1ff) >= 0x140;
|
| @@ -3308,14 +3308,14 @@ _initialize_xtensa_tdep (void)
|
| gdbarch_register (bfd_arch_xtensa, xtensa_gdbarch_init, xtensa_dump_tdep);
|
| xtensa_init_reggroups ();
|
|
|
| - add_setshow_zinteger_cmd ("xtensa",
|
| - class_maintenance,
|
| - &xtensa_debug_level,
|
| + add_setshow_zuinteger_cmd ("xtensa",
|
| + class_maintenance,
|
| + &xtensa_debug_level,
|
| _("Set Xtensa debugging."),
|
| _("Show Xtensa debugging."), _("\
|
| When non-zero, Xtensa-specific debugging is enabled. \
|
| Can be 1, 2, 3, or 4 indicating the level of debugging."),
|
| - NULL,
|
| - NULL,
|
| - &setdebuglist, &showdebuglist);
|
| + NULL,
|
| + NULL,
|
| + &setdebuglist, &showdebuglist);
|
| }
|
|
|