Index: gdb/testsuite/gdb.arch/i386-cpuid.h |
diff --git a/gdb/testsuite/gdb.arch/i386-cpuid.h b/gdb/testsuite/gdb.arch/i386-cpuid.h |
deleted file mode 100644 |
index e26d60104c8ada45d971a4a2ea86377292327aa0..0000000000000000000000000000000000000000 |
--- a/gdb/testsuite/gdb.arch/i386-cpuid.h |
+++ /dev/null |
@@ -1,200 +0,0 @@ |
-/* Helper file for i386 platform. Runtime check for MMX/SSE/SSE2/AVX |
- * support. Copied from gcc 4.4. |
- * |
- * Copyright (C) 2007-2009, 2011-2012 Free Software Foundation, Inc. |
- * |
- * This file is free software; you can redistribute it and/or modify it |
- * under the terms of the GNU General Public License as published by the |
- * Free Software Foundation; either version 3, or (at your option) any |
- * later version. |
- * |
- * This file is distributed in the hope that it will be useful, but |
- * WITHOUT ANY WARRANTY; without even the implied warranty of |
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
- * General Public License for more details. |
- * |
- * Under Section 7 of GPL version 3, you are granted additional |
- * permissions described in the GCC Runtime Library Exception, version |
- * 3.1, as published by the Free Software Foundation. |
- * |
- * You should have received a copy of the GNU General Public License and |
- * a copy of the GCC Runtime Library Exception along with this program; |
- * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see |
- * <http://www.gnu.org/licenses/>. |
- */ |
- |
-/* %ecx */ |
-#define bit_SSE3 (1 << 0) |
-#define bit_PCLMUL (1 << 1) |
-#define bit_SSSE3 (1 << 9) |
-#define bit_FMA (1 << 12) |
-#define bit_CMPXCHG16B (1 << 13) |
-#define bit_SSE4_1 (1 << 19) |
-#define bit_SSE4_2 (1 << 20) |
-#define bit_MOVBE (1 << 22) |
-#define bit_POPCNT (1 << 23) |
-#define bit_AES (1 << 25) |
-#define bit_XSAVE (1 << 26) |
-#define bit_OSXSAVE (1 << 27) |
-#define bit_AVX (1 << 28) |
- |
-/* %edx */ |
-#define bit_CMPXCHG8B (1 << 8) |
-#define bit_CMOV (1 << 15) |
-#define bit_MMX (1 << 23) |
-#define bit_FXSAVE (1 << 24) |
-#define bit_SSE (1 << 25) |
-#define bit_SSE2 (1 << 26) |
- |
-/* Extended Features */ |
-/* %ecx */ |
-#define bit_LAHF_LM (1 << 0) |
-#define bit_ABM (1 << 5) |
-#define bit_SSE4a (1 << 6) |
-#define bit_XOP (1 << 11) |
-#define bit_LWP (1 << 15) |
-#define bit_FMA4 (1 << 16) |
- |
-/* %edx */ |
-#define bit_LM (1 << 29) |
-#define bit_3DNOWP (1 << 30) |
-#define bit_3DNOW (1 << 31) |
- |
- |
-#if defined(__i386__) && defined(__PIC__) |
-/* %ebx may be the PIC register. */ |
-#if __GNUC__ >= 3 |
-#define __cpuid(level, a, b, c, d) \ |
- __asm__ ("xchg{l}\t{%%}ebx, %1\n\t" \ |
- "cpuid\n\t" \ |
- "xchg{l}\t{%%}ebx, %1\n\t" \ |
- : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ |
- : "0" (level)) |
- |
-#define __cpuid_count(level, count, a, b, c, d) \ |
- __asm__ ("xchg{l}\t{%%}ebx, %1\n\t" \ |
- "cpuid\n\t" \ |
- "xchg{l}\t{%%}ebx, %1\n\t" \ |
- : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ |
- : "0" (level), "2" (count)) |
-#else |
-/* Host GCCs older than 3.0 weren't supporting Intel asm syntax |
- nor alternatives in i386 code. */ |
-#define __cpuid(level, a, b, c, d) \ |
- __asm__ ("xchgl\t%%ebx, %1\n\t" \ |
- "cpuid\n\t" \ |
- "xchgl\t%%ebx, %1\n\t" \ |
- : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ |
- : "0" (level)) |
- |
-#define __cpuid_count(level, count, a, b, c, d) \ |
- __asm__ ("xchgl\t%%ebx, %1\n\t" \ |
- "cpuid\n\t" \ |
- "xchgl\t%%ebx, %1\n\t" \ |
- : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ |
- : "0" (level), "2" (count)) |
-#endif |
-#else |
-#define __cpuid(level, a, b, c, d) \ |
- __asm__ ("cpuid\n\t" \ |
- : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ |
- : "0" (level)) |
- |
-#define __cpuid_count(level, count, a, b, c, d) \ |
- __asm__ ("cpuid\n\t" \ |
- : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \ |
- : "0" (level), "2" (count)) |
-#endif |
- |
-/* Return highest supported input value for cpuid instruction. ext can |
- be either 0x0 or 0x8000000 to return highest supported value for |
- basic or extended cpuid information. Function returns 0 if cpuid |
- is not supported or whatever cpuid returns in eax register. If sig |
- pointer is non-null, then first four bytes of the signature |
- (as found in ebx register) are returned in location pointed by sig. */ |
- |
-static __inline unsigned int |
-__get_cpuid_max (unsigned int __ext, unsigned int *__sig) |
-{ |
- unsigned int __eax, __ebx, __ecx, __edx; |
- |
-#ifndef __x86_64__ |
-#if __GNUC__ >= 3 |
- /* See if we can use cpuid. On AMD64 we always can. */ |
- __asm__ ("pushf{l|d}\n\t" |
- "pushf{l|d}\n\t" |
- "pop{l}\t%0\n\t" |
- "mov{l}\t{%0, %1|%1, %0}\n\t" |
- "xor{l}\t{%2, %0|%0, %2}\n\t" |
- "push{l}\t%0\n\t" |
- "popf{l|d}\n\t" |
- "pushf{l|d}\n\t" |
- "pop{l}\t%0\n\t" |
- "popf{l|d}\n\t" |
- : "=&r" (__eax), "=&r" (__ebx) |
- : "i" (0x00200000)); |
-#else |
-/* Host GCCs older than 3.0 weren't supporting Intel asm syntax |
- nor alternatives in i386 code. */ |
- __asm__ ("pushfl\n\t" |
- "pushfl\n\t" |
- "popl\t%0\n\t" |
- "movl\t%0, %1\n\t" |
- "xorl\t%2, %0\n\t" |
- "pushl\t%0\n\t" |
- "popfl\n\t" |
- "pushfl\n\t" |
- "popl\t%0\n\t" |
- "popfl\n\t" |
- : "=&r" (__eax), "=&r" (__ebx) |
- : "i" (0x00200000)); |
-#endif |
- |
- if (!((__eax ^ __ebx) & 0x00200000)) |
- return 0; |
-#endif |
- |
- /* Host supports cpuid. Return highest supported cpuid input value. */ |
- __cpuid (__ext, __eax, __ebx, __ecx, __edx); |
- |
- if (__sig) |
- *__sig = __ebx; |
- |
- return __eax; |
-} |
- |
-/* Return cpuid data for requested cpuid level, as found in returned |
- eax, ebx, ecx and edx registers. The function checks if cpuid is |
- supported and returns 1 for valid cpuid information or 0 for |
- unsupported cpuid level. All pointers are required to be non-null. */ |
- |
-static __inline int |
-__get_cpuid (unsigned int __level, |
- unsigned int *__eax, unsigned int *__ebx, |
- unsigned int *__ecx, unsigned int *__edx) |
-{ |
- unsigned int __ext = __level & 0x80000000; |
- |
- if (__get_cpuid_max (__ext, 0) < __level) |
- return 0; |
- |
- __cpuid (__level, *__eax, *__ebx, *__ecx, *__edx); |
- return 1; |
-} |
- |
-#ifndef NOINLINE |
-#define NOINLINE __attribute__ ((noinline)) |
-#endif |
- |
-unsigned int i386_cpuid (void) NOINLINE; |
- |
-unsigned int NOINLINE |
-i386_cpuid (void) |
-{ |
- unsigned int eax, ebx, ecx, edx; |
- |
- if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)) |
- return 0; |
- |
- return edx; |
-} |