Index: sim/bfin/dv-bfin_pll.c |
diff --git a/sim/bfin/dv-bfin_pll.c b/sim/bfin/dv-bfin_pll.c |
index 0fbae2165885fb1ee9c16cd25ed92e0a6d408950..f572c0a75739d31f94a8f8fa50f7b30bab5269ac 100644 |
--- a/sim/bfin/dv-bfin_pll.c |
+++ b/sim/bfin/dv-bfin_pll.c |
@@ -1,6 +1,6 @@ |
/* Blackfin Phase Lock Loop (PLL) model. |
- Copyright (C) 2010-2012 Free Software Foundation, Inc. |
+ Copyright (C) 2010-2013 Free Software Foundation, Inc. |
Contributed by Analog Devices, Inc. |
This file is part of simulators. |